Implemented

68k
- Most instructions
- Condition codes
- Interrupts
- Exceptions (very incomplete and broken)
- User mode
Z80
- Most instructions
- Flags
- Interrupt mode 1
- Instruction cycle durations
VDP
- Scanline-based rendering
- H40 and H30
- V30 and V28
- Shadow/highlight mode
- Interlace Mode 2
- Sprite/pixel limit
- Sprite masking
- Sprite table caching
- Edgecase when the sprite mask is the first sprite rendered on the scanline
- VRAM-to-VRAM DMA
FM
- 6 FM channels
  - Phase Generator
  - Envelope Generator
    - ASDR envelopes
    - SSG-EG
  - Operators
    - Feedback
    - Algorithms
  - Per-operator frequencies
    - CSM mode
- DAC channel
- Timer A and Timer B
- Busy flag
PSG
- 3 tone channels
- Noise channel
  - White noise mode
  - Periodic noise mode
Joypads
- 3-button Mega Drive controller
- 6-button Mega Drive controller
- Two joypads
Mega CD
- Sub-68000
- RF5C164 PCM chip
- CD-DA

Unimplemented

68k
- Instruction cycle durations
- Exceptions
- The RESET instruction
VDP
- Slot-based rendering
- Interlacing in Interlace Mode 1 and Interlace Mode 2
- DMA transfer durations
- HV counter
- Mode 4
- FIFO, and related 68k delays
Z80
- The HALT, OUT, IN, IM, INI, IND, INIR, INDR, OTDI, OUTD, OTIR, and OTDR instructions.
- Interrupt modes 0 and 2
  - Mode 0 is identical to Mode 1 on the Mega Drive
- Proper interrupt timings
- R register
FM
- Low-Frequency Oscillator
- Debug registers
SRAM
Cartridge mappers
Joypads
- Having more than two joypads connected at once
- Types of joypad besides the standard 3-button and 6-button Mega Drive controllers
- The latch delay that Decap Attack requires in order for its input to work
Master System support
Game Gear support
Mega CD
- Graphical operations
- CDC destination register stuff (CDC to WAVE-RAM, main-68000, etc.)
- BRAM
- CD-DA
  - Fader
32X support
Remaining quirks and undefined behaviour of the original Mega Drive hardware