@@ -75,15 +75,15 @@ int HCISpiTransportClass::begin()
7575 digitalWrite (_ble_rst, HIGH);
7676 delay (5 );
7777
78- #if defined(STBTLE_RF )
78+ #if defined(SPBTLE_RF )
7979 // Wait for Blue Initialize
8080 wait_for_blue_initialize ();
81- #endif /* STBTLE_RF */
81+ #endif /* SPBTLE_RF */
8282
83- #if defined(STBTLE_1S )
83+ #if defined(SPBTLE_1S )
8484 // Wait a while for the reset of the BLE module
8585 delay (300 );
86- #endif /* STBTLE_1S */
86+ #endif /* SPBTLE_1S */
8787
8888 return 1 ;
8989}
@@ -132,11 +132,11 @@ int HCISpiTransportClass::available()
132132 /* Write the header */
133133 _spi->transfer (header_master, 5 );
134134
135- #if defined(STBTLE_RF )
135+ #if defined(SPBTLE_RF )
136136 /* device is ready */
137137 if (header_master[0 ] == 0x02 )
138138 {
139- #endif /* STBTLE_RF */
139+ #endif /* SPBTLE_RF */
140140 uint16_t byte_count = (header_master[4 ] << 8 ) | header_master[3 ];
141141
142142 if (byte_count > 0 )
@@ -156,7 +156,7 @@ int HCISpiTransportClass::available()
156156 _write_index_initial++;
157157 }
158158
159- #if defined(STBTLE_RF )
159+ #if defined(SPBTLE_RF )
160160 /* Check if the message is a Blue Initialize */
161161 /* If so we need to send the command to enable LL_ONLY */
162162 if (byte_count == 6 )
@@ -171,8 +171,8 @@ int HCISpiTransportClass::available()
171171 ble_reset = 1 ;
172172 }
173173 }
174- #endif /* STBTLE_RF */
175- #if defined(STBTLE_1S )
174+ #endif /* SPBTLE_RF */
175+ #if defined(SPBTLE_1S )
176176 /* Check if the message is a CMD_COMPLETE */
177177 /* We suppose that the first CMD is always a HCI_RESET */
178178 if (byte_count == 7 )
@@ -188,7 +188,7 @@ int HCISpiTransportClass::available()
188188 ble_reset = 1 ;
189189 }
190190 }
191- #endif /* STBTLE_1S */
191+ #endif /* SPBTLE_1S */
192192 } else
193193 {
194194 /* avoid to read more data that available size of the buffer */
@@ -207,9 +207,9 @@ int HCISpiTransportClass::available()
207207 }
208208 }
209209 }
210- #if defined(STBTLE_RF )
210+ #if defined(SPBTLE_RF )
211211 }
212- #endif /* STBTLE_RF */
212+ #endif /* SPBTLE_RF */
213213
214214 digitalWrite (_cs_pin, HIGH);
215215
@@ -218,15 +218,15 @@ int HCISpiTransportClass::available()
218218
219219 if (ble_reset)
220220 {
221- #if defined(STBTLE_RF )
221+ #if defined(SPBTLE_RF )
222222 /* BLE chip was reset: we need to enable LL_ONLY */
223223 enable_ll_only ();
224224 wait_for_enable_ll_only ();
225- #endif /* STBTLE_RF */
226- #if defined(STBTLE_1S )
225+ #endif /* SPBTLE_RF */
226+ #if defined(SPBTLE_1S )
227227 /* BLE chip was reset: we need to wait for a while */
228228 delay (300 );
229- #endif /* STBTLE_1S */
229+ #endif /* SPBTLE_1S */
230230
231231 /* Now we can update the write index and close the initial phase */
232232 _write_index = _write_index_initial;
@@ -287,16 +287,16 @@ size_t HCISpiTransportClass::write(const uint8_t* data, size_t length)
287287
288288 do
289289 {
290- #if defined(STBTLE_1S )
290+ #if defined(SPBTLE_1S )
291291 uint32_t tickstart_data_available = millis ();
292- #endif /* STBTLE_1S */
292+ #endif /* SPBTLE_1S */
293293 result = 0 ;
294294
295295 _spi->beginTransaction (SPISettings (_frequency, MSBFIRST, _spi_mode));
296296
297297 digitalWrite (_cs_pin, LOW);
298298
299- #if defined(STBTLE_1S )
299+ #if defined(SPBTLE_1S )
300300 /*
301301 * Wait until BlueNRG-1 is ready.
302302 * When ready it will raise the IRQ pin.
@@ -316,33 +316,33 @@ size_t HCISpiTransportClass::write(const uint8_t* data, size_t length)
316316 _spi->endTransaction ();
317317 break ;
318318 }
319- #endif /* STBTLE_1S */
319+ #endif /* SPBTLE_1S */
320320
321321 /* Write the header */
322322 _spi->transfer (header_master, 5 );
323323
324- #if defined(STBTLE_RF )
324+ #if defined(SPBTLE_RF )
325325 /* device is ready */
326326 if (header_master[0 ] == 0x02 )
327327 {
328328 if (header_master[1 ] >= length)
329- #endif /* STBTLE_RF */
330- #if defined(STBTLE_1S )
329+ #endif /* SPBTLE_RF */
330+ #if defined(SPBTLE_1S )
331331 if ((int )((((uint16_t )header_master[2 ])<<8 ) | ((uint16_t )header_master[1 ])) >= (int )length)
332- #endif /* STBTLE_1S */
332+ #endif /* SPBTLE_1S */
333333 {
334334 /* Write the data */
335335 _spi->transfer (my_data, length);
336336 } else
337337 {
338338 result = -2 ;
339339 }
340- #if defined(STBTLE_RF )
340+ #if defined(SPBTLE_RF )
341341 } else
342342 {
343343 result = -1 ;
344344 }
345- #endif /* STBTLE_RF */
345+ #endif /* SPBTLE_RF */
346346
347347 digitalWrite (_cs_pin, HIGH);
348348
@@ -364,7 +364,7 @@ size_t HCISpiTransportClass::write(const uint8_t* data, size_t length)
364364 }
365365}
366366
367- #if defined(STBTLE_RF )
367+ #if defined(SPBTLE_RF )
368368void HCISpiTransportClass::wait_for_blue_initialize ()
369369{
370370 int event_blue_initialize = 0 ;
@@ -535,7 +535,7 @@ void HCISpiTransportClass::enable_ll_only()
535535 _spi->endTransaction ();
536536 } while (result < 0 );
537537}
538- #endif /* STBTLE_RF */
538+ #endif /* SPBTLE_RF */
539539
540540#if defined(ARDUINO_STEVAL_MKSBOX1V1)
541541HCISpiTransportClass HCISpiTransport (SpiHCI, PD0, PD4, PA8, 1000000 , SPI_MODE1); /* STEVAL_MKSBOX1V1 */
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