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48 | 48 | /** |
49 | 49 | * Define Tx Power |
50 | 50 | */ |
51 | | -#define CFG_TX_POWER (0x18) /* -0.15dBm */ |
| 51 | +#ifndef CFG_TX_POWER |
| 52 | + #define CFG_TX_POWER (0x18) /* -0.15dBm */ |
| 53 | +#endif |
52 | 54 |
|
53 | 55 | #if 0 |
54 | 56 | /** |
|
132 | 134 | * Maximum number of simultaneous connections that the device will support. |
133 | 135 | * Valid values are from 1 to 8 |
134 | 136 | */ |
135 | | -#define CFG_BLE_NUM_LINK 8 |
| 137 | +#ifndef CFG_BLE_NUM_LINK |
| 138 | +#ifdef STM32WB15xx |
| 139 | + #define CFG_BLE_NUM_LINK 3 |
| 140 | +#else |
| 141 | + #define CFG_BLE_NUM_LINK 8 |
| 142 | +#endif |
| 143 | +#endif |
136 | 144 |
|
137 | 145 | /** |
138 | 146 | * Maximum number of Services that can be stored in the GATT database. |
139 | 147 | * Note that the GAP and GATT services are automatically added so this parameter should be 2 plus the number of user services |
140 | 148 | */ |
141 | | -#define CFG_BLE_NUM_GATT_SERVICES 8 |
| 149 | +#ifndef CFG_BLE_NUM_GATT_SERVICES |
| 150 | +#ifdef STM32WB15xx |
| 151 | + #define CFG_BLE_NUM_GATT_SERVICES 4 |
| 152 | +#else |
| 153 | + #define CFG_BLE_NUM_GATT_SERVICES 8 |
| 154 | +#endif |
| 155 | +#endif |
142 | 156 |
|
143 | 157 | /** |
144 | 158 | * Maximum number of Attributes |
|
147 | 161 | * Note that certain characteristics and relative descriptors are added automatically during device initialization |
148 | 162 | * so this parameters should be 9 plus the number of user Attributes |
149 | 163 | */ |
150 | | -#define CFG_BLE_NUM_GATT_ATTRIBUTES 68 |
| 164 | +#ifndef CFG_BLE_NUM_GATT_ATTRIBUTES |
| 165 | +#ifdef STM32WB15xx |
| 166 | + #define CFG_BLE_NUM_GATT_ATTRIBUTES 30 |
| 167 | +#else |
| 168 | + #define CFG_BLE_NUM_GATT_ATTRIBUTES 68 |
| 169 | +#endif |
| 170 | +#endif |
151 | 171 |
|
152 | 172 | /** |
153 | 173 | * Maximum supported ATT_MTU size |
154 | 174 | * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set |
155 | 175 | */ |
156 | | -#define CFG_BLE_MAX_ATT_MTU (156) |
| 176 | +#ifndef CFG_BLE_MAX_ATT_MTU |
| 177 | + #define CFG_BLE_MAX_ATT_MTU (156) |
| 178 | +#endif |
157 | 179 |
|
158 | 180 | /** |
159 | 181 | * Size of the storage area for Attribute values |
|
166 | 188 | * The total amount of memory needed is the sum of the above quantities for each attribute. |
167 | 189 | * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set |
168 | 190 | */ |
169 | | -#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) |
| 191 | +#ifndef CFG_BLE_ATT_VALUE_ARRAY_SIZE |
| 192 | +#ifdef STM32WB15xx |
| 193 | + #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1290) |
| 194 | +#else |
| 195 | + #define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344) |
| 196 | +#endif |
| 197 | +#endif |
170 | 198 |
|
171 | 199 | /** |
172 | 200 | * Prepare Write List size in terms of number of packet |
173 | 201 | * This parameter is ignored by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_LL_ONLY flag set |
174 | 202 | */ |
175 | 203 | // #define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU) |
176 | | -#define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) |
| 204 | +#ifndef CFG_BLE_PREPARE_WRITE_LIST_SIZE |
| 205 | + #define CFG_BLE_PREPARE_WRITE_LIST_SIZE (0x3A) |
| 206 | +#endif |
177 | 207 |
|
178 | 208 | /** |
179 | 209 | * Number of allocated memory blocks |
|
185 | 215 | /** |
186 | 216 | * Enable or disable the Extended Packet length feature. Valid values are 0 or 1. |
187 | 217 | */ |
188 | | -#define CFG_BLE_DATA_LENGTH_EXTENSION 1 |
| 218 | +#ifndef CFG_BLE_DATA_LENGTH_EXTENSION |
| 219 | + #define CFG_BLE_DATA_LENGTH_EXTENSION 1 |
| 220 | +#endif |
189 | 221 |
|
190 | 222 | /** |
191 | 223 | * Sleep clock accuracy in Slave mode (ppm value) |
192 | 224 | */ |
193 | | -#define CFG_BLE_SLAVE_SCA 500 |
| 225 | +#ifndef CFG_BLE_SLAVE_SCA |
| 226 | + #define CFG_BLE_SLAVE_SCA 500 |
| 227 | +#endif |
194 | 228 |
|
195 | 229 | /** |
196 | 230 | * Sleep clock accuracy in Master mode |
|
203 | 237 | * 6 : 21 ppm to 30 ppm |
204 | 238 | * 7 : 0 ppm to 20 ppm |
205 | 239 | */ |
206 | | -#define CFG_BLE_MASTER_SCA 0 |
| 240 | +#ifndef CFG_BLE_MASTER_SCA |
| 241 | + #define CFG_BLE_MASTER_SCA 0 |
| 242 | +#endif |
207 | 243 |
|
208 | 244 | /** |
209 | 245 | * LsSource |
|
212 | 248 | * - bit 1: 1: STM32WB5M Module device 0: Other devices as STM32WBxx SOC, STM32WB1M module |
213 | 249 | * - bit 2: 1: HSE/1024 Clock config 0: LSE Clock config |
214 | 250 | */ |
215 | | -#if defined(STM32WB5Mxx) |
216 | | - #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) |
217 | | -#else |
218 | | - #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) |
| 251 | +#ifndef CFG_BLE_LS_SOURCE |
| 252 | + #if defined(STM32WB5Mxx) |
| 253 | + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_MOD5MM_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) |
| 254 | + #else |
| 255 | + #define CFG_BLE_LS_SOURCE (SHCI_C2_BLE_INIT_CFG_BLE_LS_NOCALIB | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE) |
| 256 | + #endif |
219 | 257 | #endif |
220 | 258 |
|
221 | 259 | /** |
222 | 260 | * Start up time of the high speed (16 or 32 MHz) crystal oscillator in units of 625/256 us (~2.44 us) |
223 | 261 | */ |
224 | | -#define CFG_BLE_HSE_STARTUP_TIME 0x148 |
| 262 | +#ifndef CFG_BLE_HSE_STARTUP_TIME |
| 263 | + #define CFG_BLE_HSE_STARTUP_TIME 0x148 |
| 264 | +#endif |
225 | 265 |
|
226 | 266 | /** |
227 | 267 | * Maximum duration of the connection event when the device is in Slave mode in units of 625/256 us (~2.44 us) |
228 | 268 | */ |
229 | | -#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) |
| 269 | +#ifndef CFG_BLE_MAX_CONN_EVENT_LENGTH |
| 270 | + #define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF) |
| 271 | +#endif |
230 | 272 |
|
231 | 273 | /** |
232 | 274 | * Viterbi Mode |
|
314 | 356 | * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set |
315 | 357 | */ |
316 | 358 |
|
317 | | -#define CFG_BLE_MAX_ADV_SET_NBR (8) |
| 359 | +#if defined(STM32WB15xx) |
| 360 | + #define CFG_BLE_MAX_ADV_SET_NBR (3) |
| 361 | +#else |
| 362 | + #define CFG_BLE_MAX_ADV_SET_NBR (8) |
| 363 | +#endif |
318 | 364 |
|
319 | 365 | /* Maximum advertising data length (in bytes) |
320 | 366 | * Range: 31 .. 1650 with limitation: |
|
323 | 369 | * This parameter is considered by the CPU2 when CFG_BLE_OPTIONS has SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV flag set |
324 | 370 | */ |
325 | 371 |
|
326 | | -#define CFG_BLE_MAX_ADV_DATA_LEN (207) |
| 372 | +#if defined(STM32WB15xx) |
| 373 | + #define CFG_BLE_MAX_ADV_DATA_LEN (414) |
| 374 | +#else |
| 375 | + #define CFG_BLE_MAX_ADV_DATA_LEN (207) |
| 376 | +#endif |
327 | 377 |
|
328 | 378 | /* RF TX Path Compensation Value (16-bit signed integer). Units: 0.1 dB. |
329 | 379 | * Range: -1280 .. 1280 |
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