Skip to content

Commit e5dcd7e

Browse files
0xc01700xc0170
authored
Merge pull request #15164 from jeromecoutant/PR_L151CB
STM32L1: add support of MCU_STM32L151xB
2 parents ac0fa10 + 9675b6c commit e5dcd7e

File tree

15 files changed

+1532
-9
lines changed

15 files changed

+1532
-9
lines changed

‎targets/TARGET_STM/TARGET_STM32L1/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
add_subdirectory(TARGET_STM32L100xB EXCLUDE_FROM_ALL)
55
add_subdirectory(TARGET_STM32L100xC EXCLUDE_FROM_ALL)
66
add_subdirectory(TARGET_STM32L151xB EXCLUDE_FROM_ALL)
7+
add_subdirectory(TARGET_STM32L151xBA EXCLUDE_FROM_ALL)
78
add_subdirectory(TARGET_STM32L151xC EXCLUDE_FROM_ALL)
89
add_subdirectory(TARGET_STM32L151xD EXCLUDE_FROM_ALL)
910
add_subdirectory(TARGET_STM32L151xE EXCLUDE_FROM_ALL)

‎targets/TARGET_STM/TARGET_STM32L1/PeripheralNames.h‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,9 @@ typedef enum {
4646
typedef enum {
4747
SPI_1 = (int)SPI1_BASE,
4848
SPI_2 = (int)SPI2_BASE,
49+
#if defined SPI3_BASE
4950
SPI_3 = (int)SPI3_BASE
51+
#endif
5052
} SPIName;
5153

5254
typedef enum {
@@ -58,7 +60,9 @@ typedef enum {
5860
PWM_2 = (int)TIM2_BASE,
5961
PWM_3 = (int)TIM3_BASE,
6062
PWM_4 = (int)TIM4_BASE,
63+
#if defined TIM5_BASE
6164
PWM_5 = (int)TIM5_BASE,
65+
#endif
6266
PWM_9 = (int)TIM9_BASE,
6367
PWM_10 = (int)TIM10_BASE,
6468
PWM_11 = (int)TIM11_BASE

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xB/cmsis_nvic.h‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,10 +30,7 @@
3030
#endif
3131

3232
#if !defined(MBED_RAM_SIZE)
33-
#define MBED_RAM_SIZE 0x8000 // 32 KB
34-
// 0x4000 // 16 KB STM32L151CB STM32L151RB STM32L151VB
35-
// 0x8000 // 32 KB STM32L151CBxxA STM32L151RBxxA STM32L151VBxxA
36-
#warning "check MBED_RAM_SIZE value in cmsis_nvic.h"
33+
#define MBED_RAM_SIZE 0x4000 // 16 KB
3734
#endif
3835

3936
#define NVIC_NUM_VECTORS 61

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xBA/CMakeLists.txt‎

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
# Copyright (c) 2020 ARM Limited. All rights reserved.
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
5+
set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32l151xba.S)
6+
set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32l151xba.ld)
7+
elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
8+
set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32l151xba.S)
9+
set(LINKER_FILE TOOLCHAIN_ARM/stm32l151xba.sct)
10+
endif()
11+
12+
add_library(mbed-stm32l151xba INTERFACE)
13+
14+
target_include_directories(mbed-stm32l151xba
15+
INTERFACE
16+
.
17+
)
18+
19+
target_sources(mbed-stm32l151xba
20+
INTERFACE
21+
${STARTUP_FILE}
22+
)
23+
24+
mbed_set_linker_script(mbed-stm32l151xba ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
25+
26+
target_link_libraries(mbed-stm32l151xba INTERFACE mbed-stm32l1)

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xBA/TOOLCHAIN_ARM/startup_stm32l151xba.S‎

Lines changed: 267 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,267 @@
1+
;********************* (C) COPYRIGHT 2017 STMicroelectronics ********************
2+
;* File Name : startup_stm32l151xba.s
3+
;* Author : MCD Application Team
4+
;* Description : STM32L151XBA Devices vector for MDK-ARM toolchain.
5+
;* This module performs:
6+
;* - Set the initial SP
7+
;* - Set the initial PC == Reset_Handler
8+
;* - Set the vector table entries with the exceptions ISR
9+
;* address.
10+
;* - Configure the system clock
11+
;* - Branches to __main in the C library (which eventually
12+
;* calls main()).
13+
;* After Reset the Cortex-M3 processor is in Thread mode,
14+
;* priority is Privileged, and the Stack is set to Main.
15+
;********************************************************************************
16+
;*
17+
;* Copyright (c) 2017 STMicroelectronics. All rights reserved.
18+
;*
19+
;* This software component is licensed by ST under BSD 3-Clause license,
20+
;* the "License"; You may not use this file except in compliance with the
21+
;* License. You may obtain a copy of the License at:
22+
;* opensource.org/licenses/BSD-3-Clause
23+
;*
24+
;*******************************************************************************
25+
;* <<< Use Configuration Wizard in Context Menu >>>
26+
;
27+
PRESERVE8
28+
THUMB
29+
30+
31+
; Vector Table Mapped to Address 0 at Reset
32+
AREA RESET, DATA, READONLY
33+
EXPORT __Vectors
34+
EXPORT __Vectors_End
35+
EXPORT __Vectors_Size
36+
37+
IMPORT |Image$$ARM_LIB_STACK$$ZI$$Limit|
38+
__Vectors DCD |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack
39+
DCD Reset_Handler ; Reset Handler
40+
DCD NMI_Handler ; NMI Handler
41+
DCD HardFault_Handler ; Hard Fault Handler
42+
DCD MemManage_Handler ; MPU Fault Handler
43+
DCD BusFault_Handler ; Bus Fault Handler
44+
DCD UsageFault_Handler ; Usage Fault Handler
45+
DCD 0 ; Reserved
46+
DCD 0 ; Reserved
47+
DCD 0 ; Reserved
48+
DCD 0 ; Reserved
49+
DCD SVC_Handler ; SVCall Handler
50+
DCD DebugMon_Handler ; Debug Monitor Handler
51+
DCD 0 ; Reserved
52+
DCD PendSV_Handler ; PendSV Handler
53+
DCD SysTick_Handler ; SysTick Handler
54+
55+
; External Interrupts
56+
DCD WWDG_IRQHandler ; Window Watchdog
57+
DCD PVD_IRQHandler ; PVD through EXTI Line detect
58+
DCD TAMPER_STAMP_IRQHandler ; Tamper and Time Stamp
59+
DCD RTC_WKUP_IRQHandler ; RTC Wakeup
60+
DCD FLASH_IRQHandler ; FLASH
61+
DCD RCC_IRQHandler ; RCC
62+
DCD EXTI0_IRQHandler ; EXTI Line 0
63+
DCD EXTI1_IRQHandler ; EXTI Line 1
64+
DCD EXTI2_IRQHandler ; EXTI Line 2
65+
DCD EXTI3_IRQHandler ; EXTI Line 3
66+
DCD EXTI4_IRQHandler ; EXTI Line 4
67+
DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
68+
DCD DMA1_Channel2_IRQHandler ; DMA1 Channel 2
69+
DCD DMA1_Channel3_IRQHandler ; DMA1 Channel 3
70+
DCD DMA1_Channel4_IRQHandler ; DMA1 Channel 4
71+
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
72+
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
73+
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
74+
DCD ADC1_IRQHandler ; ADC1
75+
DCD USB_HP_IRQHandler ; USB High Priority
76+
DCD USB_LP_IRQHandler ; USB Low Priority
77+
DCD DAC_IRQHandler ; DAC
78+
DCD COMP_IRQHandler ; COMP through EXTI Line
79+
DCD EXTI9_5_IRQHandler ; EXTI Line 9..5
80+
DCD 0 ; Reserved
81+
DCD TIM9_IRQHandler ; TIM9
82+
DCD TIM10_IRQHandler ; TIM10
83+
DCD TIM11_IRQHandler ; TIM11
84+
DCD TIM2_IRQHandler ; TIM2
85+
DCD TIM3_IRQHandler ; TIM3
86+
DCD TIM4_IRQHandler ; TIM4
87+
DCD I2C1_EV_IRQHandler ; I2C1 Event
88+
DCD I2C1_ER_IRQHandler ; I2C1 Error
89+
DCD I2C2_EV_IRQHandler ; I2C2 Event
90+
DCD I2C2_ER_IRQHandler ; I2C2 Error
91+
DCD SPI1_IRQHandler ; SPI1
92+
DCD SPI2_IRQHandler ; SPI2
93+
DCD USART1_IRQHandler ; USART1
94+
DCD USART2_IRQHandler ; USART2
95+
DCD USART3_IRQHandler ; USART3
96+
DCD EXTI15_10_IRQHandler ; EXTI Line 15..10
97+
DCD RTC_Alarm_IRQHandler ; RTC Alarm through EXTI Line
98+
DCD USB_FS_WKUP_IRQHandler ; USB FS Wakeup from suspend
99+
DCD TIM6_IRQHandler ; TIM6
100+
DCD TIM7_IRQHandler ; TIM7
101+
102+
__Vectors_End
103+
104+
__Vectors_Size EQU __Vectors_End - __Vectors
105+
106+
AREA |.text|, CODE, READONLY
107+
108+
; Reset handler routine
109+
Reset_Handler PROC
110+
EXPORT Reset_Handler [WEAK]
111+
IMPORT __main
112+
IMPORT SystemInit
113+
LDR R0, =SystemInit
114+
BLX R0
115+
LDR R0, =__main
116+
BX R0
117+
ENDP
118+
119+
; Dummy Exception Handlers (infinite loops which can be modified)
120+
121+
NMI_Handler PROC
122+
EXPORT NMI_Handler [WEAK]
123+
B .
124+
ENDP
125+
HardFault_Handler\
126+
PROC
127+
EXPORT HardFault_Handler [WEAK]
128+
B .
129+
ENDP
130+
MemManage_Handler\
131+
PROC
132+
EXPORT MemManage_Handler [WEAK]
133+
B .
134+
ENDP
135+
BusFault_Handler\
136+
PROC
137+
EXPORT BusFault_Handler [WEAK]
138+
B .
139+
ENDP
140+
UsageFault_Handler\
141+
PROC
142+
EXPORT UsageFault_Handler [WEAK]
143+
B .
144+
ENDP
145+
SVC_Handler PROC
146+
EXPORT SVC_Handler [WEAK]
147+
B .
148+
ENDP
149+
DebugMon_Handler\
150+
PROC
151+
EXPORT DebugMon_Handler [WEAK]
152+
B .
153+
ENDP
154+
PendSV_Handler PROC
155+
EXPORT PendSV_Handler [WEAK]
156+
B .
157+
ENDP
158+
SysTick_Handler PROC
159+
EXPORT SysTick_Handler [WEAK]
160+
B .
161+
ENDP
162+
163+
Default_Handler PROC
164+
165+
EXPORT WWDG_IRQHandler [WEAK]
166+
EXPORT PVD_IRQHandler [WEAK]
167+
EXPORT TAMPER_STAMP_IRQHandler [WEAK]
168+
EXPORT RTC_WKUP_IRQHandler [WEAK]
169+
EXPORT FLASH_IRQHandler [WEAK]
170+
EXPORT RCC_IRQHandler [WEAK]
171+
EXPORT EXTI0_IRQHandler [WEAK]
172+
EXPORT EXTI1_IRQHandler [WEAK]
173+
EXPORT EXTI2_IRQHandler [WEAK]
174+
EXPORT EXTI3_IRQHandler [WEAK]
175+
EXPORT EXTI4_IRQHandler [WEAK]
176+
EXPORT DMA1_Channel1_IRQHandler [WEAK]
177+
EXPORT DMA1_Channel2_IRQHandler [WEAK]
178+
EXPORT DMA1_Channel3_IRQHandler [WEAK]
179+
EXPORT DMA1_Channel4_IRQHandler [WEAK]
180+
EXPORT DMA1_Channel5_IRQHandler [WEAK]
181+
EXPORT DMA1_Channel6_IRQHandler [WEAK]
182+
EXPORT DMA1_Channel7_IRQHandler [WEAK]
183+
EXPORT ADC1_IRQHandler [WEAK]
184+
EXPORT USB_HP_IRQHandler [WEAK]
185+
EXPORT USB_LP_IRQHandler [WEAK]
186+
EXPORT DAC_IRQHandler [WEAK]
187+
EXPORT COMP_IRQHandler [WEAK]
188+
EXPORT EXTI9_5_IRQHandler [WEAK]
189+
EXPORT TIM9_IRQHandler [WEAK]
190+
EXPORT TIM10_IRQHandler [WEAK]
191+
EXPORT TIM11_IRQHandler [WEAK]
192+
EXPORT TIM2_IRQHandler [WEAK]
193+
EXPORT TIM3_IRQHandler [WEAK]
194+
EXPORT TIM4_IRQHandler [WEAK]
195+
EXPORT I2C1_EV_IRQHandler [WEAK]
196+
EXPORT I2C1_ER_IRQHandler [WEAK]
197+
EXPORT I2C2_EV_IRQHandler [WEAK]
198+
EXPORT I2C2_ER_IRQHandler [WEAK]
199+
EXPORT SPI1_IRQHandler [WEAK]
200+
EXPORT SPI2_IRQHandler [WEAK]
201+
EXPORT USART1_IRQHandler [WEAK]
202+
EXPORT USART2_IRQHandler [WEAK]
203+
EXPORT USART3_IRQHandler [WEAK]
204+
EXPORT EXTI15_10_IRQHandler [WEAK]
205+
EXPORT RTC_Alarm_IRQHandler [WEAK]
206+
EXPORT USB_FS_WKUP_IRQHandler [WEAK]
207+
EXPORT TIM6_IRQHandler [WEAK]
208+
EXPORT TIM7_IRQHandler [WEAK]
209+
210+
WWDG_IRQHandler
211+
PVD_IRQHandler
212+
TAMPER_STAMP_IRQHandler
213+
RTC_WKUP_IRQHandler
214+
FLASH_IRQHandler
215+
RCC_IRQHandler
216+
EXTI0_IRQHandler
217+
EXTI1_IRQHandler
218+
EXTI2_IRQHandler
219+
EXTI3_IRQHandler
220+
EXTI4_IRQHandler
221+
DMA1_Channel1_IRQHandler
222+
DMA1_Channel2_IRQHandler
223+
DMA1_Channel3_IRQHandler
224+
DMA1_Channel4_IRQHandler
225+
DMA1_Channel5_IRQHandler
226+
DMA1_Channel6_IRQHandler
227+
DMA1_Channel7_IRQHandler
228+
ADC1_IRQHandler
229+
USB_HP_IRQHandler
230+
USB_LP_IRQHandler
231+
DAC_IRQHandler
232+
COMP_IRQHandler
233+
EXTI9_5_IRQHandler
234+
TIM9_IRQHandler
235+
TIM10_IRQHandler
236+
TIM11_IRQHandler
237+
TIM2_IRQHandler
238+
TIM3_IRQHandler
239+
TIM4_IRQHandler
240+
I2C1_EV_IRQHandler
241+
I2C1_ER_IRQHandler
242+
I2C2_EV_IRQHandler
243+
I2C2_ER_IRQHandler
244+
SPI1_IRQHandler
245+
SPI2_IRQHandler
246+
USART1_IRQHandler
247+
USART2_IRQHandler
248+
USART3_IRQHandler
249+
EXTI15_10_IRQHandler
250+
RTC_Alarm_IRQHandler
251+
USB_FS_WKUP_IRQHandler
252+
TIM6_IRQHandler
253+
TIM7_IRQHandler
254+
255+
B .
256+
257+
ENDP
258+
259+
ALIGN
260+
261+
;*******************************************************************************
262+
; User Stack and Heap initialization
263+
;*******************************************************************************
264+
265+
END
266+
267+
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****

‎targets/TARGET_STM/TARGET_STM32L1/TARGET_STM32L151xBA/TOOLCHAIN_ARM/stm32l151xba.sct‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m3
2+
; Scatter-Loading Description File
3+
;
4+
; SPDX-License-Identifier: BSD-3-Clause
5+
;******************************************************************************
6+
;* @attention
7+
;*
8+
;* Copyright (c) 2016-2020 STMicroelectronics.
9+
;* All rights reserved.
10+
;*
11+
;* This software component is licensed by ST under BSD 3-Clause license,
12+
;* the "License"; You may not use this file except in compliance with the
13+
;* License. You may obtain a copy of the License at:
14+
;* opensource.org/licenses/BSD-3-Clause
15+
;*
16+
;******************************************************************************
17+
18+
#include "../cmsis_nvic.h"
19+
20+
#if !defined(MBED_APP_START)
21+
#define MBED_APP_START MBED_ROM_START
22+
#endif
23+
24+
#if !defined(MBED_APP_SIZE)
25+
#define MBED_APP_SIZE MBED_ROM_SIZE
26+
#endif
27+
28+
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
29+
/* This value is normally defined by the tools to 0x1000 for bare metal and 0x400 for RTOS */
30+
#if defined(MBED_BOOT_STACK_SIZE)
31+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
32+
#else
33+
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
34+
#endif
35+
#endif
36+
37+
/* Round up VECTORS_SIZE to 8 bytes */
38+
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
39+
40+
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
41+
42+
ER_IROM1 MBED_APP_START MBED_APP_SIZE {
43+
*.o (RESET, +First)
44+
*(InRoot$$Sections)
45+
.ANY (+RO)
46+
}
47+
48+
RW_IRAM1 (MBED_RAM_START + VECTORS_SIZE) { ; RW data
49+
.ANY (+RW +ZI)
50+
}
51+
52+
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { ; Heap growing up
53+
}
54+
55+
ARM_LIB_STACK (MBED_RAM_START + MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; Stack region growing down
56+
}
57+
}

0 commit comments

Comments
 (0)