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Merge pull request #2870 from NXPmicro/Add_KL82_Support
Add kl82 support
2 parents 1ba3499 + b0c52c5 commit 78f1067

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features/unsupported/tests/mbed/analog/main.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,10 +20,14 @@ AnalogOut out(PTE30);
2020
AnalogIn in(PTB11); // D9
2121
AnalogOut out(PTB1); // D1
2222

23-
#elif defined(TARGET_KL46Z)
23+
#elif defined(TARGET_KL46Z) || defined(TARGET_KL43Z)
2424
AnalogIn in(PTB0);
2525
AnalogOut out(PTE30);
2626

27+
#elif defined(TARGET_KL82Z)
28+
AnalogIn in(A2);
29+
AnalogOut out(DAC0_OUT);
30+
2731
#elif defined(TARGET_LPC1549)
2832
AnalogIn in(A0);
2933
AnalogOut out(D12); //D12 is P0_12, the DAC output pin

features/unsupported/tests/mbed/i2c_eeprom/main.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,12 @@ I2C i2c(PTD6, PTD7);
3030
#elif defined(TARGET_KL46Z)
3131
I2C i2c(PTC9, PTC8);
3232

33+
#elif defined(TARGET_KL43Z)
34+
I2C i2c(PTE0, PTE1);
35+
36+
#elif defined(TARGET_KL82Z)
37+
I2C i2c(PTC11, PTC10);
38+
3339
#elif defined(TARGET_K64F)
3440
I2C i2c(PTE25, PTE24);
3541

features/unsupported/tests/mbed/i2c_eeprom_line/main.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,12 @@ I2C i2c(PTD6, PTD7);
4040
#elif defined(TARGET_KL46Z)
4141
I2C i2c(PTC9, PTC8);
4242

43+
#elif defined(TARGET_KL43Z)
44+
I2C i2c(PTE0, PTE1);
45+
46+
#elif defined(TARGET_KL82Z)
47+
I2C i2c(PTC11, PTC10);
48+
4349
#elif defined(TARGET_K64F)
4450
I2C i2c(PTE25, PTE24);
4551

features/unsupported/tests/rtos/mbed/file/main.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ void sd_thread(void const *argument)
2424
#if defined(TARGET_KL25Z)
2525
SDFileSystem sd(PTD2, PTD3, PTD1, PTD0, "sd");
2626

27-
#elif defined(TARGET_KL46Z)
27+
#elif defined(TARGET_KL46Z) || defined(TARGET_KL43Z) || defined(TARGET_KL82Z)
2828
SDFileSystem sd(PTD6, PTD7, PTD5, PTD4, "sd");
2929

3030
#elif defined(TARGET_K64F) || defined(TARGET_K66F)
Lines changed: 102 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,102 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
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*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
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*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
#ifndef MBED_PERIPHERALNAMES_H
17+
#define MBED_PERIPHERALNAMES_H
18+
19+
#include "cmsis.h"
20+
21+
#ifdef __cplusplus
22+
extern "C" {
23+
#endif
24+
25+
typedef enum {
26+
OSC32KCLK = 0,
27+
} RTCName;
28+
29+
/* LPUART */
30+
typedef enum {
31+
LPUART_0 = 0,
32+
LPUART_1 = 1,
33+
LPUART_2 = 2,
34+
} UARTName;
35+
36+
#define STDIO_UART_TX USBTX
37+
#define STDIO_UART_RX USBRX
38+
#define STDIO_UART LPUART_0
39+
40+
typedef enum {
41+
I2C_0 = 0,
42+
I2C_1 = 1,
43+
} I2CName;
44+
45+
#define TPM_SHIFT 8
46+
typedef enum {
47+
PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
48+
PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
49+
PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
50+
PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
51+
PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
52+
PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
53+
PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
54+
PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
55+
PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
56+
PWM_10 = (2 << TPM_SHIFT) | (1), // TPM2 CH1
57+
} PWMName;
58+
59+
#define ADC_INSTANCE_SHIFT 8
60+
#define ADC_B_CHANNEL_SHIFT 5
61+
typedef enum {
62+
ADC0_SE0 = (0 << ADC_INSTANCE_SHIFT) | 0,
63+
ADC0_SE1 = (0 << ADC_INSTANCE_SHIFT) | 1,
64+
ADC0_SE2 = (0 << ADC_INSTANCE_SHIFT) | 2,
65+
ADC0_SE3 = (0 << ADC_INSTANCE_SHIFT) | 3,
66+
ADC0_SE4a = (0 << ADC_INSTANCE_SHIFT) | 4,
67+
ADC0_SE5a = (0 << ADC_INSTANCE_SHIFT) | 5,
68+
ADC0_SE6a = (0 << ADC_INSTANCE_SHIFT) | 6,
69+
ADC0_SE7a = (0 << ADC_INSTANCE_SHIFT) | 7,
70+
ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
71+
ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
72+
ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
73+
ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
74+
ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
75+
ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
76+
ADC0_SE11 = (0 << ADC_INSTANCE_SHIFT) | 11,
77+
ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
78+
ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
79+
ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
80+
ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
81+
ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
82+
ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
83+
ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
84+
ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21,
85+
ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22,
86+
ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23,
87+
} ADCName;
88+
89+
typedef enum {
90+
SPI_0 = 0,
91+
SPI_1 = 1,
92+
} SPIName;
93+
94+
typedef enum {
95+
DAC_0 = 0
96+
} DACName;
97+
98+
#ifdef __cplusplus
99+
}
100+
#endif
101+
102+
#endif
Lines changed: 160 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,160 @@
1+
/* mbed Microcontroller Library
2+
* Copyright (c) 2006-2013 ARM Limited
3+
*
4+
* Licensed under the Apache License, Version 2.0 (the "License");
5+
* you may not use this file except in compliance with the License.
6+
* You may obtain a copy of the License at
7+
*
8+
* http://www.apache.org/licenses/LICENSE-2.0
9+
*
10+
* Unless required by applicable law or agreed to in writing, software
11+
* distributed under the License is distributed on an "AS IS" BASIS,
12+
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13+
* See the License for the specific language governing permissions and
14+
* limitations under the License.
15+
*/
16+
17+
#include "PeripheralPins.h"
18+
19+
/************RTC***************/
20+
const PinMap PinMap_RTC[] = {
21+
{NC, OSC32KCLK, 0},
22+
};
23+
24+
/************ADC***************/
25+
const PinMap PinMap_ADC[] = {
26+
{PTB0, ADC0_SE8, 0},
27+
{PTB1, ADC0_SE9, 0},
28+
{PTB2, ADC0_SE12, 0},
29+
{PTB3, ADC0_SE13, 0},
30+
{PTC0, ADC0_SE14, 0},
31+
{PTC1, ADC0_SE15, 0},
32+
{PTC2, ADC0_SE4b, 0},
33+
{PTD1, ADC0_SE5b, 0},
34+
{PTD5, ADC0_SE6b, 0},
35+
{PTD6, ADC0_SE7b, 0},
36+
{NC, NC, 0}
37+
};
38+
39+
/************DAC***************/
40+
const PinMap PinMap_DAC[] = {
41+
{DAC0_OUT, DAC_0, 0},
42+
{NC, NC, 0}
43+
};
44+
45+
/************I2C***************/
46+
const PinMap PinMap_I2C_SDA[] = {
47+
{PTB1, I2C_0, 2},
48+
{PTB3, I2C_0, 2},
49+
{PTC11, I2C_1, 2},
50+
{PTD3, I2C_0, 7},
51+
{PTD9, I2C_0, 2},
52+
{PTE0, I2C_1, 6},
53+
{NC, NC , 0}
54+
};
55+
56+
const PinMap PinMap_I2C_SCL[] = {
57+
{PTB0, I2C_0, 2},
58+
{PTB2, I2C_0, 2},
59+
{PTC10, I2C_1, 2},
60+
{PTD2, I2C_0, 7},
61+
{PTD8, I2C_0, 2},
62+
{PTE1, I2C_1, 6},
63+
{NC, NC, 0}
64+
};
65+
66+
/************LPUART***************/
67+
const PinMap PinMap_UART_TX[] = {
68+
{PTA2, LPUART_0, 2},
69+
{PTA14, LPUART_0, 3},
70+
{PTB17, LPUART_0, 3},
71+
{PTC4, LPUART_1, 3},
72+
{PTD3, LPUART_2, 3},
73+
{PTD7, LPUART_0, 3},
74+
{PTE0, LPUART_1, 3},
75+
{NC, NC, 0}
76+
};
77+
78+
const PinMap PinMap_UART_RX[] = {
79+
{PTA1, LPUART_0, 2},
80+
{PTA15, LPUART_0, 3},
81+
{PTB16, LPUART_0, 3},
82+
{PTC3, LPUART_1, 3},
83+
{PTD2, LPUART_2, 3},
84+
{PTD6, LPUART_0, 3},
85+
{PTE1, LPUART_1, 3},
86+
{NC, NC, 0}
87+
};
88+
89+
/************SPI***************/
90+
const PinMap PinMap_SPI_SCLK[] = {
91+
{PTE1, SPI_1, 2},
92+
{PTE2, SPI_1, 7},
93+
{PTA15, SPI_1, 2},
94+
{PTB11, SPI_1, 2},
95+
{PTC5, SPI_0, 2},
96+
{PTD1, SPI_0, 2},
97+
{PTD5, SPI_1, 7},
98+
{NC, NC, 0}
99+
};
100+
101+
const PinMap PinMap_SPI_MOSI[] = {
102+
{PTE2, SPI_1, 2},
103+
{PTE3, SPI_1, 7},
104+
{PTA16, SPI_1, 2},
105+
{PTB16, SPI_1, 2},
106+
{PTC6, SPI_0, 2},
107+
{PTD2, SPI_0, 2},
108+
{PTD6, SPI_1, 7},
109+
{NC, NC, 0}
110+
};
111+
112+
const PinMap PinMap_SPI_MISO[] = {
113+
{PTE1, SPI_1, 7},
114+
{PTE4, SPI_1, 2},
115+
{PTA17, SPI_1, 2},
116+
{PTB17, SPI_1, 2},
117+
{PTC7, SPI_0, 2},
118+
{PTD3, SPI_0, 2},
119+
{PTD7, SPI_1, 7},
120+
{NC, NC, 0}
121+
};
122+
123+
const PinMap PinMap_SPI_SSEL[] = {
124+
{PTE5, SPI_1, 2},
125+
{PTA14, SPI_1, 2},
126+
{PTB10, SPI_1, 2},
127+
{PTC4, SPI_0, 2},
128+
{PTD0, SPI_0, 2},
129+
{PTD4, SPI_1, 7},
130+
{NC, NC, 0}
131+
};
132+
133+
/************PWM***************/
134+
const PinMap PinMap_PWM[] = {
135+
{PTA0, PWM_6, 3}, // PTA0 , TPM0 CH5
136+
{PTA3, PWM_1, 3}, // PTA3 , TPM0 CH0
137+
{PTA4, PWM_2 , 3}, // PTA4 , TPM0 CH1
138+
{PTA5, PWM_3 , 3}, // PTA5 , TPM0 CH2
139+
{PTA10, PWM_9, 3}, // PTA10, TPM2 CH0
140+
{PTA11, PWM_10, 3}, // PTA11, TPM2 CH1
141+
{PTA12, PWM_7 , 3}, // PTA12, TPM1 CH0
142+
{PTA13, PWM_8 , 3}, // PTA13, TPM1 CH1
143+
144+
{PTB0, PWM_7, 3}, // PTB0 , TPM1 CH0
145+
{PTB1, PWM_8, 3}, // PTB1 , TPM1 CH1
146+
{PTB18, PWM_9, 3}, // PTB18, TPM2 CH0
147+
{PTB19, PWM_10, 3}, // PTB18, TPM2 CH1
148+
149+
{PTC1, PWM_1, 4}, // PTC1 , TPM0 CH0
150+
{PTC2, PWM_2, 4}, // PTC2 , TPM0 CH1
151+
{PTC3, PWM_3, 4}, // PTC3 , TPM0 CH2
152+
{PTC4, PWM_4, 4}, // PTC4 , TPM0 CH3
153+
{PTC5, PWM_3, 7}, // PTC4 , TPM0 CH2
154+
155+
{PTD4, PWM_5 , 4}, // PTD4 , TPM0 CH4
156+
{PTD5, PWM_6 , 4}, // PTD5 , TPM0 CH5
157+
158+
{NC , NC , 0}
159+
};
160+

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