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calculator-aarch64-gem5.tarmac
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0 clk cpu0 IT (1) 002105d4 d2a00200 O EL3h_s : MOVZ X0, #16, #16
0 clk cpu0 R X0 0000000000100000
250 clk cpu0 IT (2) 002105d8 9100001f O EL3h_s : ADD SP, X0, #0
500 clk cpu0 IT (3) 002105dc 940000f8 O EL3h_s : BL 0X2109BC
500 clk cpu0 R X30 00000000002105e0
1500 clk cpu0 IT (4) 002109bc a9be7bfd O EL3h_s : STP
1500 clk cpu0 MW8 000fffe0:0000000fffe0 0000000000000000
1500 clk cpu0 MW8 000fffe8:0000000fffe8 00000000002105e0
1750 clk cpu0 IT (5) 002109c0 f9000bfc O EL3h_s : STR X28, [SP, #16]
1750 clk cpu0 MW8 000ffff0:0000000ffff0 0000000000000000
2000 clk cpu0 IT (6) 002109c4 910003fd O EL3h_s : ADD X29, SP, #0
2000 clk cpu0 R X29 00000000000fffe0
2250 clk cpu0 IT (7) 002109c8 d11183ff O EL3h_s : SUB SP, SP, #1120
2500 clk cpu0 IT (8) 002109cc 90ffff80 O EL3h_s : ADRP X0, #18446744073709486080
2500 clk cpu0 R X0 0000000000200000
2750 clk cpu0 IT (9) 002109d0 91059c00 O EL3h_s : ADD X0, X0, #359
2750 clk cpu0 R X0 0000000000200167
3000 clk cpu0 IT (10) 002109d4 2a1f03e1 O EL3h_s : ORR W1, WZR, WZR
3000 clk cpu0 R W1 00000000
3250 clk cpu0 IT (11) 002109d8 97ffff59 O EL3h_s : BL 0X21073C
3250 clk cpu0 R X30 00000000002109dc
3500 clk cpu0 IT (12) 0021073c d10083ff O EL3h_s : SUB SP, SP, #32
3750 clk cpu0 IT (13) 00210740 2a0103e8 O EL3h_s : ORR W8, WZR, W1
3750 clk cpu0 R W8 00000000
4500 clk cpu0 IT (14) 00210744 a900a3e0 O EL3h_s : STP
4500 clk cpu0 MW8 000ffb68:0000000ffb68 0000000000200167
4500 clk cpu0 MW8 000ffb70:0000000ffb70 0000000000000000
4750 clk cpu0 IT (15) 00210748 39400008 O EL3h_s : LDRB W8, [W0]
4750 clk cpu0 MR1 00200167:000000200167 3a
4750 clk cpu0 R W8 0000003a
5000 clk cpu0 IT (16) 0021074c 340001a8 O EL3h_s : CBZ W8, 0X210780
5250 clk cpu0 IT (17) 00210750 aa1f03e9 O EL3h_s : ORR X9, XZR, XZR
5250 clk cpu0 R X9 0000000000000000
5500 clk cpu0 IT (18) 00210754 91000408 O EL3h_s : ADD X8, X0, #1
5500 clk cpu0 R X8 0000000000200168
5750 clk cpu0 IT (19) 00210758 3869690b O EL3h_s : LDRB W11, [W8, W9]
5750 clk cpu0 MR1 00200168:000000200168 74
5750 clk cpu0 R W11 00000074
6000 clk cpu0 IT (20) 0021075c 9100052a O EL3h_s : ADD X10, X9, #1
6000 clk cpu0 R X10 0000000000000001
6250 clk cpu0 IT (21) 00210760 aa0a03e9 O EL3h_s : ORR X9, XZR, X10
6250 clk cpu0 R X9 0000000000000001
6500 clk cpu0 IT (22) 00210764 35ffffab O EL3h_s : CBNZ W11, 0X210758
6750 clk cpu0 IT (23) 00210758 3869690b O EL3h_s : LDRB W11, [W8, W9]
6750 clk cpu0 MR1 00200169:000000200169 74
6750 clk cpu0 R W11 00000074
7000 clk cpu0 IT (24) 0021075c 9100052a O EL3h_s : ADD X10, X9, #1
7000 clk cpu0 R X10 0000000000000002
7250 clk cpu0 IT (25) 00210760 aa0a03e9 O EL3h_s : ORR X9, XZR, X10
7250 clk cpu0 R X9 0000000000000002
7500 clk cpu0 IT (26) 00210764 35ffffab O EL3h_s : CBNZ W11, 0X210758
7750 clk cpu0 IT (27) 00210758 3869690b O EL3h_s : LDRB W11, [W8, W9]
7750 clk cpu0 MR1 0020016a:00000020016a 00
7750 clk cpu0 R W11 00000000
8000 clk cpu0 IT (28) 0021075c 9100052a O EL3h_s : ADD X10, X9, #1
8000 clk cpu0 R X10 0000000000000003
8250 clk cpu0 IT (29) 00210760 aa0a03e9 O EL3h_s : ORR X9, XZR, X10
8250 clk cpu0 R X9 0000000000000003
8500 clk cpu0 IT (30) 00210764 35ffffab O EL3h_s : CBNZ W11, 0X210758
8750 clk cpu0 IT (31) 00210768 52800020 O EL3h_s : MOVZ W0, #1, #0
8750 clk cpu0 R W0 00000001
9000 clk cpu0 IT (32) 0021076c f9000fea O EL3h_s : STR X10, [SP, #24]
9000 clk cpu0 MW8 000ffb78:0000000ffb78 0000000000000003
9250 clk cpu0 IT (33) 00210770 910023e1 O EL3h_s : ADD X1, SP, #8
9250 clk cpu0 R X1 00000000000ffb68
9500 clk cpu0 IT (34) 00210774 d45e0000 O EL3h_s : HLT #0XF000
9750 clk cpu0 IT (35) 00210778 910083ff O EL3h_s : ADD SP, SP, #32
10000 clk cpu0 IT (36) 0021077c d65f03c0 O EL3h_s : RET
10250 clk cpu0 IT (37) 002109dc f81f83a0 O EL3h_s : STUR X0, [X29, #-8]
10250 clk cpu0 MW8 000fffd8:0000000fffd8 0000000000000001
10500 clk cpu0 IT (38) 002109e0 f85f83a1 O EL3h_s : LDUR X1, [X29, #-8]
10500 clk cpu0 MR8 000fffd8:0000000fffd8 0000000000000001
10500 clk cpu0 R X1 0000000000000001
10750 clk cpu0 IT (39) 002109e4 9100e3e0 O EL3h_s : ADD X0, SP, #56
10750 clk cpu0 R X0 00000000000ffbb8
11000 clk cpu0 IT (40) 002109e8 f90003e0 O EL3h_s : STR X0, [SP]
11000 clk cpu0 MW8 000ffb80:0000000ffb80 00000000000ffbb8
11250 clk cpu0 IT (41) 002109ec 94000033 O EL3h_s : BL 0X210AB8
11250 clk cpu0 R X30 00000000002109f0
11500 clk cpu0 IT (42) 00210ab8 d10043ff O EL3h_s : SUB SP, SP, #16
11750 clk cpu0 IT (43) 00210abc f90007e0 O EL3h_s : STR X0, [SP, #8]
11750 clk cpu0 MW8 000ffb78:0000000ffb78 00000000000ffbb8
12000 clk cpu0 IT (44) 00210ac0 f90003e1 O EL3h_s : STR X1, [SP]
12000 clk cpu0 MW8 000ffb70:0000000ffb70 0000000000000001
12250 clk cpu0 IT (45) 00210ac4 f94007e8 O EL3h_s : LDR X8, [SP, #8]
12250 clk cpu0 MR8 000ffb78:0000000ffb78 00000000000ffbb8
12250 clk cpu0 R X8 00000000000ffbb8
12500 clk cpu0 IT (46) 00210ac8 f94003e9 O EL3h_s : LDR X9, [SP]
12500 clk cpu0 MR8 000ffb70:0000000ffb70 0000000000000001
12500 clk cpu0 R X9 0000000000000001
12750 clk cpu0 IT (47) 00210acc f9000109 O EL3h_s : STR X9, [X8]
12750 clk cpu0 MW8 000ffbb8:0000000ffbb8 0000000000000001
13000 clk cpu0 IT (48) 00210ad0 f902051f O EL3h_s : STR XZR, [X8, #1032]
13000 clk cpu0 MW8 000fffc0:0000000fffc0 0000000000000000
13250 clk cpu0 IT (49) 00210ad4 f902091f O EL3h_s : STR XZR, [X8, #1040]
13250 clk cpu0 MW8 000fffc8:0000000fffc8 0000000000000000
13500 clk cpu0 IT (50) 00210ad8 3910611f O EL3h_s : STRB WZR, [W8, #1048]
13500 clk cpu0 MW1 000fffd0:0000000fffd0 00
13750 clk cpu0 IT (51) 00210adc 910043ff O EL3h_s : ADD SP, SP, #16
14000 clk cpu0 IT (52) 00210ae0 d65f03c0 O EL3h_s : RET
14250 clk cpu0 IT (53) 002109f0 f94003e1 O EL3h_s : LDR X1, [SP]
14250 clk cpu0 MR8 000ffb80:0000000ffb80 00000000000ffbb8
14250 clk cpu0 R X1 00000000000ffbb8
14500 clk cpu0 IT (54) 002109f4 910083e0 O EL3h_s : ADD X0, SP, #32
14500 clk cpu0 R X0 00000000000ffba0
14750 clk cpu0 IT (55) 002109f8 f90007e0 O EL3h_s : STR X0, [SP, #8]
14750 clk cpu0 MW8 000ffb88:0000000ffb88 00000000000ffba0
15000 clk cpu0 IT (56) 002109fc 9400003a O EL3h_s : BL 0X210AE4
15000 clk cpu0 R X30 0000000000210a00
15250 clk cpu0 IT (57) 00210ae4 d10043ff O EL3h_s : SUB SP, SP, #16
15500 clk cpu0 IT (58) 00210ae8 f90007e0 O EL3h_s : STR X0, [SP, #8]
15500 clk cpu0 MW8 000ffb78:0000000ffb78 00000000000ffba0
15750 clk cpu0 IT (59) 00210aec f90003e1 O EL3h_s : STR X1, [SP]
15750 clk cpu0 MW8 000ffb70:0000000ffb70 00000000000ffbb8
16000 clk cpu0 IT (60) 00210af0 f94007e8 O EL3h_s : LDR X8, [SP, #8]
16000 clk cpu0 MR8 000ffb78:0000000ffb78 00000000000ffba0
16000 clk cpu0 R X8 00000000000ffba0
16250 clk cpu0 IT (61) 00210af4 f94003e9 O EL3h_s : LDR X9, [SP]
16250 clk cpu0 MR8 000ffb70:0000000ffb70 00000000000ffbb8
16250 clk cpu0 R X9 00000000000ffbb8
16500 clk cpu0 IT (62) 00210af8 f9000109 O EL3h_s : STR X9, [X8]
16500 clk cpu0 MW8 000ffba0:0000000ffba0 00000000000ffbb8
16750 clk cpu0 IT (63) 00210afc 3900311f O EL3h_s : STRB WZR, [W8, #12]
16750 clk cpu0 MW1 000ffbac:0000000ffbac 00
17000 clk cpu0 IT (64) 00210b00 910043ff O EL3h_s : ADD SP, SP, #16
17250 clk cpu0 IT (65) 00210b04 d65f03c0 O EL3h_s : RET
17500 clk cpu0 IT (66) 00210a00 f94007e1 O EL3h_s : LDR X1, [SP, #8]
17500 clk cpu0 MR8 000ffb88:0000000ffb88 00000000000ffba0
17500 clk cpu0 R X1 00000000000ffba0
17750 clk cpu0 IT (67) 00210a04 910043e0 O EL3h_s : ADD X0, SP, #16
17750 clk cpu0 R X0 00000000000ffb90
18000 clk cpu0 IT (68) 00210a08 94000040 O EL3h_s : BL 0X210B08
18000 clk cpu0 R X30 0000000000210a0c
18250 clk cpu0 IT (69) 00210b08 d10083ff O EL3h_s : SUB SP, SP, #32
19000 clk cpu0 IT (70) 00210b0c a9017bfd O EL3h_s : STP
19000 clk cpu0 MW8 000ffb70:0000000ffb70 00000000000fffe0
19000 clk cpu0 MW8 000ffb78:0000000ffb78 0000000000210a0c
19250 clk cpu0 IT (71) 00210b10 910043fd O EL3h_s : ADD X29, SP, #16
19250 clk cpu0 R X29 00000000000ffb70
19500 clk cpu0 IT (72) 00210b14 f90007e0 O EL3h_s : STR X0, [SP, #8]
19500 clk cpu0 MW8 000ffb68:0000000ffb68 00000000000ffb90
19750 clk cpu0 IT (73) 00210b18 f90003e1 O EL3h_s : STR X1, [SP]
19750 clk cpu0 MW8 000ffb60:0000000ffb60 00000000000ffba0
20000 clk cpu0 IT (74) 00210b1c f94007e9 O EL3h_s : LDR X9, [SP, #8]
20000 clk cpu0 MR8 000ffb68:0000000ffb68 00000000000ffb90
20000 clk cpu0 R X9 00000000000ffb90
20250 clk cpu0 IT (75) 00210b20 f94003e8 O EL3h_s : LDR X8, [SP]
20250 clk cpu0 MR8 000ffb60:0000000ffb60 00000000000ffba0
20250 clk cpu0 R X8 00000000000ffba0
20500 clk cpu0 IT (76) 00210b24 f9000128 O EL3h_s : STR X8, [X9]
20500 clk cpu0 MW8 000ffb90:0000000ffb90 00000000000ffba0
20750 clk cpu0 IT (77) 00210b28 f94003e0 O EL3h_s : LDR X0, [SP]
20750 clk cpu0 MR8 000ffb60:0000000ffb60 00000000000ffba0
20750 clk cpu0 R X0 00000000000ffba0
21000 clk cpu0 IT (78) 00210b2c 94000036 O EL3h_s : BL 0X210C04
21000 clk cpu0 R X30 0000000000210b30
21250 clk cpu0 IT (79) 00210c04 d10083ff O EL3h_s : SUB SP, SP, #32
22000 clk cpu0 IT (80) 00210c08 a9017bfd O EL3h_s : STP
22000 clk cpu0 MW8 000ffb50:0000000ffb50 00000000000ffb70
22000 clk cpu0 MW8 000ffb58:0000000ffb58 0000000000210b30
22250 clk cpu0 IT (81) 00210c0c 910043fd O EL3h_s : ADD X29, SP, #16
22250 clk cpu0 R X29 00000000000ffb50
22500 clk cpu0 IT (82) 00210c10 f90007e0 O EL3h_s : STR X0, [SP, #8]
22500 clk cpu0 MW8 000ffb48:0000000ffb48 00000000000ffba0
22750 clk cpu0 IT (83) 00210c14 f94007e0 O EL3h_s : LDR X0, [SP, #8]
22750 clk cpu0 MR8 000ffb48:0000000ffb48 00000000000ffba0
22750 clk cpu0 R X0 00000000000ffba0
23000 clk cpu0 IT (84) 00210c18 94000004 O EL3h_s : BL 0X210C28
23000 clk cpu0 R X30 0000000000210c1c
23250 clk cpu0 IT (85) 00210c28 d100c3ff O EL3h_s : SUB SP, SP, #48
24000 clk cpu0 IT (86) 00210c2c a9027bfd O EL3h_s : STP
24000 clk cpu0 MW8 000ffb30:0000000ffb30 00000000000ffb50
24000 clk cpu0 MW8 000ffb38:0000000ffb38 0000000000210c1c
24250 clk cpu0 IT (87) 00210c30 910083fd O EL3h_s : ADD X29, SP, #32
24250 clk cpu0 R X29 00000000000ffb30
24500 clk cpu0 IT (88) 00210c34 f81f83a0 O EL3h_s : STUR X0, [X29, #-8]
24500 clk cpu0 MW8 000ffb28:0000000ffb28 00000000000ffba0
24750 clk cpu0 IT (89) 00210c38 f85f83a8 O EL3h_s : LDUR X8, [X29, #-8]
24750 clk cpu0 MR8 000ffb28:0000000ffb28 00000000000ffba0
24750 clk cpu0 R X8 00000000000ffba0
25000 clk cpu0 IT (90) 00210c3c f90007e8 O EL3h_s : STR X8, [SP, #8]
25000 clk cpu0 MW8 000ffb18:0000000ffb18 00000000000ffba0
25250 clk cpu0 IT (91) 00210c40 39403108 O EL3h_s : LDRB W8, [W8, #12]
25250 clk cpu0 MR1 000ffbac:0000000ffbac 00
25250 clk cpu0 R W8 00000000
25500 clk cpu0 IT (92) 00210c44 37000068 O EL3h_s : TBNZ W8, #0X1, 0X210C50
25750 clk cpu0 IT (93) 00210c48 f94007e0 O EL3h_s : LDR X0, [SP, #8]
25750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
25750 clk cpu0 R X0 00000000000ffba0
26000 clk cpu0 IT (94) 00210c4c 940000bb O EL3h_s : BL 0X210F38
26000 clk cpu0 R X30 0000000000210c50
26250 clk cpu0 IT (95) 00210f38 d10083ff O EL3h_s : SUB SP, SP, #32
27000 clk cpu0 IT (96) 00210f3c a9017bfd O EL3h_s : STP
27000 clk cpu0 MW8 000ffb00:0000000ffb00 00000000000ffb30
27000 clk cpu0 MW8 000ffb08:0000000ffb08 0000000000210c50
27250 clk cpu0 IT (97) 00210f40 910043fd O EL3h_s : ADD X29, SP, #16
27250 clk cpu0 R X29 00000000000ffb00
27500 clk cpu0 IT (98) 00210f44 f90007e0 O EL3h_s : STR X0, [SP, #8]
27500 clk cpu0 MW8 000ffaf8:0000000ffaf8 00000000000ffba0
27750 clk cpu0 IT (99) 00210f48 f94007e8 O EL3h_s : LDR X8, [SP, #8]
27750 clk cpu0 MR8 000ffaf8:0000000ffaf8 00000000000ffba0
27750 clk cpu0 R X8 00000000000ffba0
28000 clk cpu0 IT (100) 00210f4c f90003e8 O EL3h_s : STR X8, [SP]
28000 clk cpu0 MW8 000ffaf0:0000000ffaf0 00000000000ffba0
28250 clk cpu0 IT (101) 00210f50 f9400100 O EL3h_s : LDR X0, [X8]
28250 clk cpu0 MR8 000ffba0:0000000ffba0 00000000000ffbb8
28250 clk cpu0 R X0 00000000000ffbb8
28500 clk cpu0 IT (102) 00210f54 94000008 O EL3h_s : BL 0X210F74
28500 clk cpu0 R X30 0000000000210f58
28750 clk cpu0 IT (103) 00210f74 d10103ff O EL3h_s : SUB SP, SP, #64
29500 clk cpu0 IT (104) 00210f78 a9037bfd O EL3h_s : STP
29500 clk cpu0 MW8 000ffae0:0000000ffae0 00000000000ffb00
29500 clk cpu0 MW8 000ffae8:0000000ffae8 0000000000210f58
29750 clk cpu0 IT (105) 00210f7c 9100c3fd O EL3h_s : ADD X29, SP, #48
29750 clk cpu0 R X29 00000000000ffae0
30000 clk cpu0 IT (106) 00210f80 f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
30000 clk cpu0 MW8 000ffad0:0000000ffad0 00000000000ffbb8
30250 clk cpu0 IT (107) 00210f84 f85f03a9 O EL3h_s : LDUR X9, [X29, #-16]
30250 clk cpu0 MR8 000ffad0:0000000ffad0 00000000000ffbb8
30250 clk cpu0 R X9 00000000000ffbb8
30500 clk cpu0 IT (108) 00210f88 f9000be9 O EL3h_s : STR X9, [SP, #16]
30500 clk cpu0 MW8 000ffac0:0000000ffac0 00000000000ffbb8
30750 clk cpu0 IT (109) 00210f8c f9420528 O EL3h_s : LDR X8, [X9, #1032]
30750 clk cpu0 MR8 000fffc0:0000000fffc0 0000000000000000
30750 clk cpu0 R X8 0000000000000000
31000 clk cpu0 IT (110) 00210f90 f9420929 O EL3h_s : LDR X9, [X9, #1040]
31000 clk cpu0 MR8 000fffc8:0000000fffc8 0000000000000000
31000 clk cpu0 R X9 0000000000000000
31250 clk cpu0 IT (111) 00210f94 eb090108 O EL3h_s : SUBS X8, X8, X9
31250 clk cpu0 R X8 0000000000000000
31250 clk cpu0 R cpsr 600003cd
31500 clk cpu0 IT (112) 00210f98 540003a3 O EL3h_s : B.CC 0X21100C
31750 clk cpu0 IT (113) 00210f9c f9400be8 O EL3h_s : LDR X8, [SP, #16]
31750 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
31750 clk cpu0 R X8 00000000000ffbb8
32000 clk cpu0 IT (114) 00210fa0 39506108 O EL3h_s : LDRB W8, [W8, #1048]
32000 clk cpu0 MR1 000fffd0:0000000fffd0 00
32000 clk cpu0 R W8 00000000
32250 clk cpu0 IT (115) 00210fa4 36000088 O EL3h_s : TBZ W8, #0X1, 0X210FB4
32500 clk cpu0 IT (116) 00210fb4 f9400be8 O EL3h_s : LDR X8, [SP, #16]
32500 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
32500 clk cpu0 R X8 00000000000ffbb8
32750 clk cpu0 IT (117) 00210fb8 f9400100 O EL3h_s : LDR X0, [X8]
32750 clk cpu0 MR8 000ffbb8:0000000ffbb8 0000000000000001
32750 clk cpu0 R X0 0000000000000001
33000 clk cpu0 IT (118) 00210fbc 91002101 O EL3h_s : ADD X1, X8, #8
33000 clk cpu0 R X1 00000000000ffbc0
33250 clk cpu0 IT (119) 00210fc0 d2808002 O EL3h_s : MOVZ X2, #1024, #0
33250 clk cpu0 R X2 0000000000000400
33500 clk cpu0 IT (120) 00210fc4 f90007e2 O EL3h_s : STR X2, [SP, #8]
33500 clk cpu0 MW8 000ffab8:0000000ffab8 0000000000000400
33750 clk cpu0 IT (121) 00210fc8 97fffdf5 O EL3h_s : BL 0X21079C
33750 clk cpu0 R X30 0000000000210fcc
34000 clk cpu0 IT (122) 0021079c d10083ff O EL3h_s : SUB SP, SP, #32
34750 clk cpu0 IT (123) 002107a0 a90087e0 O EL3h_s : STP
34750 clk cpu0 MW8 000ffa98:0000000ffa98 0000000000000001
34750 clk cpu0 MW8 000ffaa0:0000000ffaa0 00000000000ffbc0
35000 clk cpu0 IT (124) 002107a4 528000c0 O EL3h_s : MOVZ W0, #6, #0
35000 clk cpu0 R W0 00000006
35250 clk cpu0 IT (125) 002107a8 f9000fe2 O EL3h_s : STR X2, [SP, #24]
35250 clk cpu0 MW8 000ffaa8:0000000ffaa8 0000000000000400
35500 clk cpu0 IT (126) 002107ac 910023e1 O EL3h_s : ADD X1, SP, #8
35500 clk cpu0 R X1 00000000000ffa98
35750 clk cpu0 IT (127) 002107b0 d45e0000 O EL3h_s : HLT #0XF000
36000 clk cpu0 IT (128) 002107b4 910083ff O EL3h_s : ADD SP, SP, #32
36250 clk cpu0 IT (129) 002107b8 d65f03c0 O EL3h_s : RET
36500 clk cpu0 IT (130) 00210fcc f94007e9 O EL3h_s : LDR X9, [SP, #8]
36500 clk cpu0 MR8 000ffab8:0000000ffab8 0000000000000400
36500 clk cpu0 R X9 0000000000000400
36750 clk cpu0 IT (131) 00210fd0 f9400be8 O EL3h_s : LDR X8, [SP, #16]
36750 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
36750 clk cpu0 R X8 00000000000ffbb8
37000 clk cpu0 IT (132) 00210fd4 f9000fe0 O EL3h_s : STR X0, [SP, #24]
37000 clk cpu0 MW8 000ffac8:0000000ffac8 00000000000003e3
37250 clk cpu0 IT (133) 00210fd8 f9400fea O EL3h_s : LDR X10, [SP, #24]
37250 clk cpu0 MR8 000ffac8:0000000ffac8 00000000000003e3
37250 clk cpu0 R X10 00000000000003e3
37500 clk cpu0 IT (134) 00210fdc eb0a0129 O EL3h_s : SUBS X9, X9, X10
37500 clk cpu0 R X9 000000000000001d
37500 clk cpu0 R cpsr 200003cd
37750 clk cpu0 IT (135) 00210fe0 f9020909 O EL3h_s : STR X9, [X8, #1040]
37750 clk cpu0 MW8 000fffc8:0000000fffc8 000000000000001d
38000 clk cpu0 IT (136) 00210fe4 f9420908 O EL3h_s : LDR X8, [X8, #1040]
38000 clk cpu0 MR8 000fffc8:0000000fffc8 000000000000001d
38000 clk cpu0 R X8 000000000000001d
38250 clk cpu0 IT (137) 00210fe8 b50000e8 O EL3h_s : CBNZ X8, 0X211004
38500 clk cpu0 IT (138) 00211004 f9400be8 O EL3h_s : LDR X8, [SP, #16]
38500 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
38500 clk cpu0 R X8 00000000000ffbb8
38750 clk cpu0 IT (139) 00211008 f902051f O EL3h_s : STR XZR, [X8, #1032]
38750 clk cpu0 MW8 000fffc0:0000000fffc0 0000000000000000
39000 clk cpu0 IT (140) 0021100c f9400beb O EL3h_s : LDR X11, [SP, #16]
39000 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
39000 clk cpu0 R X11 00000000000ffbb8
39250 clk cpu0 IT (141) 00211010 91002168 O EL3h_s : ADD X8, X11, #8
39250 clk cpu0 R X8 00000000000ffbc0
39500 clk cpu0 IT (142) 00211014 f9420569 O EL3h_s : LDR X9, [X11, #1032]
39500 clk cpu0 MR8 000fffc0:0000000fffc0 0000000000000000
39500 clk cpu0 R X9 0000000000000000
39750 clk cpu0 IT (143) 00211018 9100052a O EL3h_s : ADD X10, X9, #1
39750 clk cpu0 R X10 0000000000000001
40000 clk cpu0 IT (144) 0021101c f902056a O EL3h_s : STR X10, [X11, #1032]
40000 clk cpu0 MW8 000fffc0:0000000fffc0 0000000000000001
40250 clk cpu0 IT (145) 00211020 38696908 O EL3h_s : LDRB W8, [W8, W9]
40250 clk cpu0 MR1 000ffbc0:0000000ffbc0 32
40250 clk cpu0 R W8 00000032
40500 clk cpu0 IT (146) 00211024 b81fc3a8 O EL3h_s : STUR X8, [X29, #-4]
40500 clk cpu0 MW4 000ffadc:0000000ffadc 00000032
40750 clk cpu0 IT (147) 00211028 b85fc3a0 O EL3h_s : LDUR X0, [X29, #-4]
40750 clk cpu0 MR4 000ffadc:0000000ffadc 00000032
40750 clk cpu0 R X0 0000000000000032
41250 clk cpu0 IT (148) 0021102c a9437bfd O EL3h_s : LDP
41250 clk cpu0 MW16 000ffae0:0000000ffae0 00000000000000000000000000210f58
41250 clk cpu0 R X29 00000000000ffb00
41250 clk cpu0 R X30 0000000000210f58
41500 clk cpu0 IT (149) 00211030 910103ff O EL3h_s : ADD SP, SP, #64
41750 clk cpu0 IT (150) 00211034 d65f03c0 O EL3h_s : RET
42000 clk cpu0 IT (151) 00210f58 f94003e9 O EL3h_s : LDR X9, [SP]
42000 clk cpu0 MR8 000ffaf0:0000000ffaf0 00000000000ffba0
42000 clk cpu0 R X9 00000000000ffba0
42250 clk cpu0 IT (152) 00210f5c b9000920 O EL3h_s : STR X0, [X9, #8]
42250 clk cpu0 MW4 000ffba8:0000000ffba8 00000032
42500 clk cpu0 IT (153) 00210f60 52800028 O EL3h_s : MOVZ W8, #1, #0
42500 clk cpu0 R W8 00000001
42750 clk cpu0 IT (154) 00210f64 39003128 O EL3h_s : STRB W8, [W9, #12]
42750 clk cpu0 MW1 000ffbac:0000000ffbac 01
43250 clk cpu0 IT (155) 00210f68 a9417bfd O EL3h_s : LDP
43250 clk cpu0 MW16 000ffb00:0000000ffb00 00000000000000000000000000210c50
43250 clk cpu0 R X29 00000000000ffb30
43250 clk cpu0 R X30 0000000000210c50
43500 clk cpu0 IT (156) 00210f6c 910083ff O EL3h_s : ADD SP, SP, #32
43750 clk cpu0 IT (157) 00210f70 d65f03c0 O EL3h_s : RET
44000 clk cpu0 IT (158) 00210c50 f94007e8 O EL3h_s : LDR X8, [SP, #8]
44000 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
44000 clk cpu0 R X8 00000000000ffba0
44250 clk cpu0 IT (159) 00210c54 b9400909 O EL3h_s : LDR X9, [X8, #8]
44250 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
44250 clk cpu0 R X9 0000000000000032
44500 clk cpu0 IT (160) 00210c58 52800028 O EL3h_s : MOVZ W8, #1, #0
44500 clk cpu0 R W8 00000001
44750 clk cpu0 IT (161) 00210c5c 71008129 O EL3h_s : SUBS W9, W9, #32
44750 clk cpu0 R W9 00000012
44750 clk cpu0 R cpsr 200003cd
45000 clk cpu0 IT (162) 00210c60 b90007e8 O EL3h_s : STR X8, [SP, #4]
45000 clk cpu0 MW4 000ffb14:0000000ffb14 00000001
45250 clk cpu0 IT (163) 00210c64 54000180 O EL3h_s : B.EQ 0X210C94
45500 clk cpu0 IT (164) 00210c68 f94007e8 O EL3h_s : LDR X8, [SP, #8]
45500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
45500 clk cpu0 R X8 00000000000ffba0
45750 clk cpu0 IT (165) 00210c6c b9400909 O EL3h_s : LDR X9, [X8, #8]
45750 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
45750 clk cpu0 R X9 0000000000000032
46000 clk cpu0 IT (166) 00210c70 52800028 O EL3h_s : MOVZ W8, #1, #0
46000 clk cpu0 R W8 00000001
46250 clk cpu0 IT (167) 00210c74 71002529 O EL3h_s : SUBS W9, W9, #9
46250 clk cpu0 R W9 00000029
46250 clk cpu0 R cpsr 200003cd
46500 clk cpu0 IT (168) 00210c78 b90007e8 O EL3h_s : STR X8, [SP, #4]
46500 clk cpu0 MW4 000ffb14:0000000ffb14 00000001
46750 clk cpu0 IT (169) 00210c7c 540000c0 O EL3h_s : B.EQ 0X210C94
47000 clk cpu0 IT (170) 00210c80 f94007e8 O EL3h_s : LDR X8, [SP, #8]
47000 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
47000 clk cpu0 R X8 00000000000ffba0
47250 clk cpu0 IT (171) 00210c84 b9400908 O EL3h_s : LDR X8, [X8, #8]
47250 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
47250 clk cpu0 R X8 0000000000000032
47500 clk cpu0 IT (172) 00210c88 71003508 O EL3h_s : SUBS W8, W8, #13
47500 clk cpu0 R W8 00000025
47500 clk cpu0 R cpsr 200003cd
47750 clk cpu0 IT (173) 00210c8c 1a9f17e8 O EL3h_s : CSINC W8, WZR, WZR, NE
47750 clk cpu0 R W8 00000000
48000 clk cpu0 IT (174) 00210c90 b90007e8 O EL3h_s : STR X8, [SP, #4]
48000 clk cpu0 MW4 000ffb14:0000000ffb14 00000000
48250 clk cpu0 IT (175) 00210c94 b94007e8 O EL3h_s : LDR X8, [SP, #4]
48250 clk cpu0 MR4 000ffb14:0000000ffb14 00000000
48250 clk cpu0 R X8 0000000000000000
48500 clk cpu0 IT (176) 00210c98 36000088 O EL3h_s : TBZ W8, #0X1, 0X210FB4
48750 clk cpu0 IT (177) 00210ca8 f94007e8 O EL3h_s : LDR X8, [SP, #8]
48750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
48750 clk cpu0 R X8 00000000000ffba0
49000 clk cpu0 IT (178) 00210cac b9400908 O EL3h_s : LDR X8, [X8, #8]
49000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
49000 clk cpu0 R X8 0000000000000032
49250 clk cpu0 IT (179) 00210cb0 71008d08 O EL3h_s : SUBS W8, W8, #35
49250 clk cpu0 R W8 0000000f
49250 clk cpu0 R cpsr 200003cd
49500 clk cpu0 IT (180) 00210cb4 54000261 O EL3h_s : B.NE 0X210D00
49750 clk cpu0 IT (181) 00210d00 f94007e8 O EL3h_s : LDR X8, [SP, #8]
49750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
49750 clk cpu0 R X8 00000000000ffba0
50000 clk cpu0 IT (182) 00210d04 b9400908 O EL3h_s : LDR X8, [X8, #8]
50000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
50000 clk cpu0 R X8 0000000000000032
50250 clk cpu0 IT (183) 00210d08 31020108 O EL3h_s : ADDS W8, W8, #128
50250 clk cpu0 R W8 000000b2
50250 clk cpu0 R cpsr 000003cd
50500 clk cpu0 IT (184) 00210d0c 540000a1 O EL3h_s : B.NE 0X210D20
50750 clk cpu0 IT (185) 00210d20 f94007e8 O EL3h_s : LDR X8, [SP, #8]
50750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
50750 clk cpu0 R X8 00000000000ffba0
51000 clk cpu0 IT (186) 00210d24 b9400908 O EL3h_s : LDR X8, [X8, #8]
51000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
51000 clk cpu0 R X8 0000000000000032
51250 clk cpu0 IT (187) 00210d28 7100ad08 O EL3h_s : SUBS W8, W8, #43
51250 clk cpu0 R W8 00000007
51250 clk cpu0 R cpsr 200003cd
51500 clk cpu0 IT (188) 00210d2c 54000320 O EL3h_s : B.EQ 0X210D90
51750 clk cpu0 IT (189) 00210d30 f94007e8 O EL3h_s : LDR X8, [SP, #8]
51750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
51750 clk cpu0 R X8 00000000000ffba0
52000 clk cpu0 IT (190) 00210d34 b9400908 O EL3h_s : LDR X8, [X8, #8]
52000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
52000 clk cpu0 R X8 0000000000000032
52250 clk cpu0 IT (191) 00210d38 7100b508 O EL3h_s : SUBS W8, W8, #45
52250 clk cpu0 R W8 00000005
52250 clk cpu0 R cpsr 200003cd
52500 clk cpu0 IT (192) 00210d3c 540002a0 O EL3h_s : B.EQ 0X210D90
52750 clk cpu0 IT (193) 00210d40 f94007e8 O EL3h_s : LDR X8, [SP, #8]
52750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
52750 clk cpu0 R X8 00000000000ffba0
53000 clk cpu0 IT (194) 00210d44 b9400908 O EL3h_s : LDR X8, [X8, #8]
53000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
53000 clk cpu0 R X8 0000000000000032
53250 clk cpu0 IT (195) 00210d48 7100a908 O EL3h_s : SUBS W8, W8, #42
53250 clk cpu0 R W8 00000008
53250 clk cpu0 R cpsr 200003cd
53500 clk cpu0 IT (196) 00210d4c 54000220 O EL3h_s : B.EQ 0X210D90
53750 clk cpu0 IT (197) 00210d50 f94007e8 O EL3h_s : LDR X8, [SP, #8]
53750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
53750 clk cpu0 R X8 00000000000ffba0
54000 clk cpu0 IT (198) 00210d54 b9400908 O EL3h_s : LDR X8, [X8, #8]
54000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
54000 clk cpu0 R X8 0000000000000032
54250 clk cpu0 IT (199) 00210d58 7100a108 O EL3h_s : SUBS W8, W8, #40
54250 clk cpu0 R W8 0000000a
54250 clk cpu0 R cpsr 200003cd
54500 clk cpu0 IT (200) 00210d5c 540001a0 O EL3h_s : B.EQ 0X210D90
54750 clk cpu0 IT (201) 00210d60 f94007e8 O EL3h_s : LDR X8, [SP, #8]
54750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
54750 clk cpu0 R X8 00000000000ffba0
55000 clk cpu0 IT (202) 00210d64 b9400908 O EL3h_s : LDR X8, [X8, #8]
55000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
55000 clk cpu0 R X8 0000000000000032
55250 clk cpu0 IT (203) 00210d68 7100a508 O EL3h_s : SUBS W8, W8, #41
55250 clk cpu0 R W8 00000009
55250 clk cpu0 R cpsr 200003cd
55500 clk cpu0 IT (204) 00210d6c 54000120 O EL3h_s : B.EQ 0X210D90
55750 clk cpu0 IT (205) 00210d70 f94007e8 O EL3h_s : LDR X8, [SP, #8]
55750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
55750 clk cpu0 R X8 00000000000ffba0
56000 clk cpu0 IT (206) 00210d74 b9400908 O EL3h_s : LDR X8, [X8, #8]
56000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
56000 clk cpu0 R X8 0000000000000032
56250 clk cpu0 IT (207) 00210d78 71017908 O EL3h_s : SUBS W8, W8, #94
56250 clk cpu0 R W8 ffffffd4
56250 clk cpu0 R cpsr 800003cd
56500 clk cpu0 IT (208) 00210d7c 540000a0 O EL3h_s : B.EQ 0X210D90
56750 clk cpu0 IT (209) 00210d80 f94007e8 O EL3h_s : LDR X8, [SP, #8]
56750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
56750 clk cpu0 R X8 00000000000ffba0
57000 clk cpu0 IT (210) 00210d84 b9400908 O EL3h_s : LDR X8, [X8, #8]
57000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
57000 clk cpu0 R X8 0000000000000032
57250 clk cpu0 IT (211) 00210d88 71002908 O EL3h_s : SUBS W8, W8, #10
57250 clk cpu0 R W8 00000028
57250 clk cpu0 R cpsr 200003cd
57500 clk cpu0 IT (212) 00210d8c 540000c1 O EL3h_s : B.NE 0X210DA4
57750 clk cpu0 IT (213) 00210da4 f94007e8 O EL3h_s : LDR X8, [SP, #8]
57750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
57750 clk cpu0 R X8 00000000000ffba0
58000 clk cpu0 IT (214) 00210da8 b9400908 O EL3h_s : LDR X8, [X8, #8]
58000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
58000 clk cpu0 R X8 0000000000000032
58250 clk cpu0 IT (215) 00210dac 7100c108 O EL3h_s : SUBS W8, W8, #48
58250 clk cpu0 R W8 00000002
58250 clk cpu0 R cpsr 200003cd
58500 clk cpu0 IT (216) 00210db0 54000b6b O EL3h_s : B.LT 0X210F1C
58750 clk cpu0 IT (217) 00210db4 f94007e8 O EL3h_s : LDR X8, [SP, #8]
58750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
58750 clk cpu0 R X8 00000000000ffba0
59000 clk cpu0 IT (218) 00210db8 b9400908 O EL3h_s : LDR X8, [X8, #8]
59000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
59000 clk cpu0 R X8 0000000000000032
59250 clk cpu0 IT (219) 00210dbc 7100e508 O EL3h_s : SUBS W8, W8, #57
59250 clk cpu0 R W8 fffffff9
59250 clk cpu0 R cpsr 800003cd
59500 clk cpu0 IT (220) 00210dc0 54000aec O EL3h_s : B.GT 0X210F1C
59750 clk cpu0 IT (221) 00210dc4 f94007e0 O EL3h_s : LDR X0, [SP, #8]
59750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
59750 clk cpu0 R X0 00000000000ffba0
60000 clk cpu0 IT (222) 00210dc8 b9400808 O EL3h_s : LDR X8, [X0, #8]
60000 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
60000 clk cpu0 R X8 0000000000000032
60250 clk cpu0 IT (223) 00210dcc 7100c108 O EL3h_s : SUBS W8, W8, #48
60250 clk cpu0 R W8 00000002
60250 clk cpu0 R cpsr 200003cd
60500 clk cpu0 IT (224) 00210dd0 b9001408 O EL3h_s : STR X8, [X0, #20]
60500 clk cpu0 MW4 000ffbb4:0000000ffbb4 00000002
60750 clk cpu0 IT (225) 00210dd4 94000059 O EL3h_s : BL 0X210F38
60750 clk cpu0 R X30 0000000000210dd8
61000 clk cpu0 IT (226) 00210f38 d10083ff O EL3h_s : SUB SP, SP, #32
61750 clk cpu0 IT (227) 00210f3c a9017bfd O EL3h_s : STP
61750 clk cpu0 MW8 000ffb00:0000000ffb00 00000000000ffb30
61750 clk cpu0 MW8 000ffb08:0000000ffb08 0000000000210dd8
62000 clk cpu0 IT (228) 00210f40 910043fd O EL3h_s : ADD X29, SP, #16
62000 clk cpu0 R X29 00000000000ffb00
62250 clk cpu0 IT (229) 00210f44 f90007e0 O EL3h_s : STR X0, [SP, #8]
62250 clk cpu0 MW8 000ffaf8:0000000ffaf8 00000000000ffba0
62500 clk cpu0 IT (230) 00210f48 f94007e8 O EL3h_s : LDR X8, [SP, #8]
62500 clk cpu0 MR8 000ffaf8:0000000ffaf8 00000000000ffba0
62500 clk cpu0 R X8 00000000000ffba0
62750 clk cpu0 IT (231) 00210f4c f90003e8 O EL3h_s : STR X8, [SP]
62750 clk cpu0 MW8 000ffaf0:0000000ffaf0 00000000000ffba0
63000 clk cpu0 IT (232) 00210f50 f9400100 O EL3h_s : LDR X0, [X8]
63000 clk cpu0 MR8 000ffba0:0000000ffba0 00000000000ffbb8
63000 clk cpu0 R X0 00000000000ffbb8
63250 clk cpu0 IT (233) 00210f54 94000008 O EL3h_s : BL 0X210F74
63250 clk cpu0 R X30 0000000000210f58
63500 clk cpu0 IT (234) 00210f74 d10103ff O EL3h_s : SUB SP, SP, #64
64250 clk cpu0 IT (235) 00210f78 a9037bfd O EL3h_s : STP
64250 clk cpu0 MW8 000ffae0:0000000ffae0 00000000000ffb00
64250 clk cpu0 MW8 000ffae8:0000000ffae8 0000000000210f58
64500 clk cpu0 IT (236) 00210f7c 9100c3fd O EL3h_s : ADD X29, SP, #48
64500 clk cpu0 R X29 00000000000ffae0
64750 clk cpu0 IT (237) 00210f80 f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
64750 clk cpu0 MW8 000ffad0:0000000ffad0 00000000000ffbb8
65000 clk cpu0 IT (238) 00210f84 f85f03a9 O EL3h_s : LDUR X9, [X29, #-16]
65000 clk cpu0 MR8 000ffad0:0000000ffad0 00000000000ffbb8
65000 clk cpu0 R X9 00000000000ffbb8
65250 clk cpu0 IT (239) 00210f88 f9000be9 O EL3h_s : STR X9, [SP, #16]
65250 clk cpu0 MW8 000ffac0:0000000ffac0 00000000000ffbb8
65500 clk cpu0 IT (240) 00210f8c f9420528 O EL3h_s : LDR X8, [X9, #1032]
65500 clk cpu0 MR8 000fffc0:0000000fffc0 0000000000000001
65500 clk cpu0 R X8 0000000000000001
65750 clk cpu0 IT (241) 00210f90 f9420929 O EL3h_s : LDR X9, [X9, #1040]
65750 clk cpu0 MR8 000fffc8:0000000fffc8 000000000000001d
65750 clk cpu0 R X9 000000000000001d
66000 clk cpu0 IT (242) 00210f94 eb090108 O EL3h_s : SUBS X8, X8, X9
66000 clk cpu0 R X8 ffffffffffffffe4
66000 clk cpu0 R cpsr 800003cd
66250 clk cpu0 IT (243) 00210f98 540003a3 O EL3h_s : B.CC 0X21100C
66500 clk cpu0 IT (244) 0021100c f9400beb O EL3h_s : LDR X11, [SP, #16]
66500 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
66500 clk cpu0 R X11 00000000000ffbb8
66750 clk cpu0 IT (245) 00211010 91002168 O EL3h_s : ADD X8, X11, #8
66750 clk cpu0 R X8 00000000000ffbc0
67000 clk cpu0 IT (246) 00211014 f9420569 O EL3h_s : LDR X9, [X11, #1032]
67000 clk cpu0 MR8 000fffc0:0000000fffc0 0000000000000001
67000 clk cpu0 R X9 0000000000000001
67250 clk cpu0 IT (247) 00211018 9100052a O EL3h_s : ADD X10, X9, #1
67250 clk cpu0 R X10 0000000000000002
67500 clk cpu0 IT (248) 0021101c f902056a O EL3h_s : STR X10, [X11, #1032]
67500 clk cpu0 MW8 000fffc0:0000000fffc0 0000000000000002
67750 clk cpu0 IT (249) 00211020 38696908 O EL3h_s : LDRB W8, [W8, W9]
67750 clk cpu0 MR1 000ffbc1:0000000ffbc1 32
67750 clk cpu0 R W8 00000032
68000 clk cpu0 IT (250) 00211024 b81fc3a8 O EL3h_s : STUR X8, [X29, #-4]
68000 clk cpu0 MW4 000ffadc:0000000ffadc 00000032
68250 clk cpu0 IT (251) 00211028 b85fc3a0 O EL3h_s : LDUR X0, [X29, #-4]
68250 clk cpu0 MR4 000ffadc:0000000ffadc 00000032
68250 clk cpu0 R X0 0000000000000032
68750 clk cpu0 IT (252) 0021102c a9437bfd O EL3h_s : LDP
68750 clk cpu0 MW16 000ffae0:0000000ffae0 00000000000000000000000000210f58
68750 clk cpu0 R X29 00000000000ffb00
68750 clk cpu0 R X30 0000000000210f58
69000 clk cpu0 IT (253) 00211030 910103ff O EL3h_s : ADD SP, SP, #64
69250 clk cpu0 IT (254) 00211034 d65f03c0 O EL3h_s : RET
69500 clk cpu0 IT (255) 00210f58 f94003e9 O EL3h_s : LDR X9, [SP]
69500 clk cpu0 MR8 000ffaf0:0000000ffaf0 00000000000ffba0
69500 clk cpu0 R X9 00000000000ffba0
69750 clk cpu0 IT (256) 00210f5c b9000920 O EL3h_s : STR X0, [X9, #8]
69750 clk cpu0 MW4 000ffba8:0000000ffba8 00000032
70000 clk cpu0 IT (257) 00210f60 52800028 O EL3h_s : MOVZ W8, #1, #0
70000 clk cpu0 R W8 00000001
70250 clk cpu0 IT (258) 00210f64 39003128 O EL3h_s : STRB W8, [W9, #12]
70250 clk cpu0 MW1 000ffbac:0000000ffbac 01
70750 clk cpu0 IT (259) 00210f68 a9417bfd O EL3h_s : LDP
70750 clk cpu0 MW16 000ffb00:0000000ffb00 00000000000000000000000000210dd8
70750 clk cpu0 R X29 00000000000ffb30
70750 clk cpu0 R X30 0000000000210dd8
71000 clk cpu0 IT (260) 00210f6c 910083ff O EL3h_s : ADD SP, SP, #32
71250 clk cpu0 IT (261) 00210f70 d65f03c0 O EL3h_s : RET
71500 clk cpu0 IT (262) 00210dd8 f94007e8 O EL3h_s : LDR X8, [SP, #8]
71500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
71500 clk cpu0 R X8 00000000000ffba0
71750 clk cpu0 IT (263) 00210ddc 52800149 O EL3h_s : MOVZ W9, #10, #0
71750 clk cpu0 R W9 0000000a
72000 clk cpu0 IT (264) 00210de0 b81f43a9 O EL3h_s : STUR X9, [X29, #-12]
72000 clk cpu0 MW4 000ffb24:0000000ffb24 0000000a
72250 clk cpu0 IT (265) 00210de4 b9401508 O EL3h_s : LDR X8, [X8, #20]
72250 clk cpu0 MR4 000ffbb4:0000000ffbb4 00000002
72250 clk cpu0 R X8 0000000000000002
72500 clk cpu0 IT (266) 00210de8 350001c8 O EL3h_s : CBNZ W8, 0X210E20
72750 clk cpu0 IT (267) 00210e20 f94007e8 O EL3h_s : LDR X8, [SP, #8]
72750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
72750 clk cpu0 R X8 00000000000ffba0
73000 clk cpu0 IT (268) 00210e24 b9401508 O EL3h_s : LDR X8, [X8, #20]
73000 clk cpu0 MR4 000ffbb4:0000000ffbb4 00000002
73000 clk cpu0 R X8 0000000000000002
73250 clk cpu0 IT (269) 00210e28 35000068 O EL3h_s : CBNZ W8, 0X210E34
73500 clk cpu0 IT (270) 00210e34 f94007e8 O EL3h_s : LDR X8, [SP, #8]
73500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
73500 clk cpu0 R X8 00000000000ffba0
73750 clk cpu0 IT (271) 00210e38 b9400908 O EL3h_s : LDR X8, [X8, #8]
73750 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
73750 clk cpu0 R X8 0000000000000032
74000 clk cpu0 IT (272) 00210e3c 7100c108 O EL3h_s : SUBS W8, W8, #48
74000 clk cpu0 R W8 00000002
74000 clk cpu0 R cpsr 200003cd
74250 clk cpu0 IT (273) 00210e40 5400014b O EL3h_s : B.LT 0X210E68
74500 clk cpu0 IT (274) 00210e44 f94007e8 O EL3h_s : LDR X8, [SP, #8]
74500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
74500 clk cpu0 R X8 00000000000ffba0
74750 clk cpu0 IT (275) 00210e48 b9400908 O EL3h_s : LDR X8, [X8, #8]
74750 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
74750 clk cpu0 R X8 0000000000000032
75000 clk cpu0 IT (276) 00210e4c 7100e508 O EL3h_s : SUBS W8, W8, #57
75000 clk cpu0 R W8 fffffff9
75000 clk cpu0 R cpsr 800003cd
75250 clk cpu0 IT (277) 00210e50 540000cc O EL3h_s : B.GT 0X210E68
75500 clk cpu0 IT (278) 00210e54 f94007e8 O EL3h_s : LDR X8, [SP, #8]
75500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
75500 clk cpu0 R X8 00000000000ffba0
75750 clk cpu0 IT (279) 00210e58 b9400908 O EL3h_s : LDR X8, [X8, #8]
75750 clk cpu0 MR4 000ffba8:0000000ffba8 00000032
75750 clk cpu0 R X8 0000000000000032
76000 clk cpu0 IT (280) 00210e5c 7100c108 O EL3h_s : SUBS W8, W8, #48
76000 clk cpu0 R W8 00000002
76000 clk cpu0 R cpsr 200003cd
76250 clk cpu0 IT (281) 00210e60 b90013e8 O EL3h_s : STR X8, [SP, #16]
76250 clk cpu0 MW4 000ffb20:0000000ffb20 00000002
76500 clk cpu0 IT (282) 00210e64 1400001c O EL3h_s : B 0X210ED4
76750 clk cpu0 IT (283) 00210ed4 b94013e8 O EL3h_s : LDR X8, [SP, #16]
76750 clk cpu0 MR4 000ffb20:0000000ffb20 00000002
76750 clk cpu0 R X8 0000000000000002
77000 clk cpu0 IT (284) 00210ed8 b85f43a9 O EL3h_s : LDUR X9, [X29, #-12]
77000 clk cpu0 MR4 000ffb24:0000000ffb24 0000000a
77000 clk cpu0 R X9 000000000000000a
77250 clk cpu0 IT (285) 00210edc 6b090108 O EL3h_s : SUBS W8, W8, W9
77250 clk cpu0 R W8 fffffff8
77250 clk cpu0 R cpsr 800003cd
77500 clk cpu0 IT (286) 00210ee0 54000043 O EL3h_s : B.CC 0X210EE8
77750 clk cpu0 IT (287) 00210ee8 f94007e0 O EL3h_s : LDR X0, [SP, #8]
77750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
77750 clk cpu0 R X0 00000000000ffba0
78000 clk cpu0 IT (288) 00210eec b9401408 O EL3h_s : LDR X8, [X0, #20]
78000 clk cpu0 MR4 000ffbb4:0000000ffbb4 00000002
78000 clk cpu0 R X8 0000000000000002
78250 clk cpu0 IT (289) 00210ef0 b85f43a9 O EL3h_s : LDUR X9, [X29, #-12]
78250 clk cpu0 MR4 000ffb24:0000000ffb24 0000000a
78250 clk cpu0 R X9 000000000000000a
78500 clk cpu0 IT (290) 00210ef4 1b097d08 O EL3h_s : MADD W8, WZR, W8, W9
78500 clk cpu0 R W8 00000014
78750 clk cpu0 IT (291) 00210ef8 b94013e9 O EL3h_s : LDR X9, [SP, #16]
78750 clk cpu0 MR4 000ffb20:0000000ffb20 00000002
78750 clk cpu0 R X9 0000000000000002
79000 clk cpu0 IT (292) 00210efc 0b090108 O EL3h_s : ADD W8, W8, W9
79000 clk cpu0 R W8 00000016
79250 clk cpu0 IT (293) 00210f00 b9001408 O EL3h_s : STR X8, [X0, #20]
79250 clk cpu0 MW4 000ffbb4:0000000ffbb4 00000016
79500 clk cpu0 IT (294) 00210f04 9400000d O EL3h_s : BL 0X210F38
79500 clk cpu0 R X30 0000000000210f08
79750 clk cpu0 IT (295) 00210f38 d10083ff O EL3h_s : SUB SP, SP, #32
80500 clk cpu0 IT (296) 00210f3c a9017bfd O EL3h_s : STP
80500 clk cpu0 MW8 000ffb00:0000000ffb00 00000000000ffb30
80500 clk cpu0 MW8 000ffb08:0000000ffb08 0000000000210f08
80750 clk cpu0 IT (297) 00210f40 910043fd O EL3h_s : ADD X29, SP, #16
80750 clk cpu0 R X29 00000000000ffb00
81000 clk cpu0 IT (298) 00210f44 f90007e0 O EL3h_s : STR X0, [SP, #8]
81000 clk cpu0 MW8 000ffaf8:0000000ffaf8 00000000000ffba0
81250 clk cpu0 IT (299) 00210f48 f94007e8 O EL3h_s : LDR X8, [SP, #8]
81250 clk cpu0 MR8 000ffaf8:0000000ffaf8 00000000000ffba0
81250 clk cpu0 R X8 00000000000ffba0
81500 clk cpu0 IT (300) 00210f4c f90003e8 O EL3h_s : STR X8, [SP]
81500 clk cpu0 MW8 000ffaf0:0000000ffaf0 00000000000ffba0
81750 clk cpu0 IT (301) 00210f50 f9400100 O EL3h_s : LDR X0, [X8]
81750 clk cpu0 MR8 000ffba0:0000000ffba0 00000000000ffbb8
81750 clk cpu0 R X0 00000000000ffbb8
82000 clk cpu0 IT (302) 00210f54 94000008 O EL3h_s : BL 0X210F74
82000 clk cpu0 R X30 0000000000210f58
82250 clk cpu0 IT (303) 00210f74 d10103ff O EL3h_s : SUB SP, SP, #64
83000 clk cpu0 IT (304) 00210f78 a9037bfd O EL3h_s : STP
83000 clk cpu0 MW8 000ffae0:0000000ffae0 00000000000ffb00
83000 clk cpu0 MW8 000ffae8:0000000ffae8 0000000000210f58
83250 clk cpu0 IT (305) 00210f7c 9100c3fd O EL3h_s : ADD X29, SP, #48
83250 clk cpu0 R X29 00000000000ffae0
83500 clk cpu0 IT (306) 00210f80 f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
83500 clk cpu0 MW8 000ffad0:0000000ffad0 00000000000ffbb8
83750 clk cpu0 IT (307) 00210f84 f85f03a9 O EL3h_s : LDUR X9, [X29, #-16]
83750 clk cpu0 MR8 000ffad0:0000000ffad0 00000000000ffbb8
83750 clk cpu0 R X9 00000000000ffbb8
84000 clk cpu0 IT (308) 00210f88 f9000be9 O EL3h_s : STR X9, [SP, #16]
84000 clk cpu0 MW8 000ffac0:0000000ffac0 00000000000ffbb8
84250 clk cpu0 IT (309) 00210f8c f9420528 O EL3h_s : LDR X8, [X9, #1032]
84250 clk cpu0 MR8 000fffc0:0000000fffc0 0000000000000002
84250 clk cpu0 R X8 0000000000000002
84500 clk cpu0 IT (310) 00210f90 f9420929 O EL3h_s : LDR X9, [X9, #1040]
84500 clk cpu0 MR8 000fffc8:0000000fffc8 000000000000001d
84500 clk cpu0 R X9 000000000000001d
84750 clk cpu0 IT (311) 00210f94 eb090108 O EL3h_s : SUBS X8, X8, X9
84750 clk cpu0 R X8 ffffffffffffffe5
84750 clk cpu0 R cpsr 800003cd
85000 clk cpu0 IT (312) 00210f98 540003a3 O EL3h_s : B.CC 0X21100C
85250 clk cpu0 IT (313) 0021100c f9400beb O EL3h_s : LDR X11, [SP, #16]
85250 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffbb8
85250 clk cpu0 R X11 00000000000ffbb8
85500 clk cpu0 IT (314) 00211010 91002168 O EL3h_s : ADD X8, X11, #8
85500 clk cpu0 R X8 00000000000ffbc0
85750 clk cpu0 IT (315) 00211014 f9420569 O EL3h_s : LDR X9, [X11, #1032]
85750 clk cpu0 MR8 000fffc0:0000000fffc0 0000000000000002
85750 clk cpu0 R X9 0000000000000002
86000 clk cpu0 IT (316) 00211018 9100052a O EL3h_s : ADD X10, X9, #1
86000 clk cpu0 R X10 0000000000000003
86250 clk cpu0 IT (317) 0021101c f902056a O EL3h_s : STR X10, [X11, #1032]
86250 clk cpu0 MW8 000fffc0:0000000fffc0 0000000000000003
86500 clk cpu0 IT (318) 00211020 38696908 O EL3h_s : LDRB W8, [W8, W9]
86500 clk cpu0 MR1 000ffbc2:0000000ffbc2 20
86500 clk cpu0 R W8 00000020
86750 clk cpu0 IT (319) 00211024 b81fc3a8 O EL3h_s : STUR X8, [X29, #-4]
86750 clk cpu0 MW4 000ffadc:0000000ffadc 00000020
87000 clk cpu0 IT (320) 00211028 b85fc3a0 O EL3h_s : LDUR X0, [X29, #-4]
87000 clk cpu0 MR4 000ffadc:0000000ffadc 00000020
87000 clk cpu0 R X0 0000000000000020
87500 clk cpu0 IT (321) 0021102c a9437bfd O EL3h_s : LDP
87500 clk cpu0 MW16 000ffae0:0000000ffae0 00000000000000000000000000210f58
87500 clk cpu0 R X29 00000000000ffb00
87500 clk cpu0 R X30 0000000000210f58
87750 clk cpu0 IT (322) 00211030 910103ff O EL3h_s : ADD SP, SP, #64
88000 clk cpu0 IT (323) 00211034 d65f03c0 O EL3h_s : RET
88250 clk cpu0 IT (324) 00210f58 f94003e9 O EL3h_s : LDR X9, [SP]
88250 clk cpu0 MR8 000ffaf0:0000000ffaf0 00000000000ffba0
88250 clk cpu0 R X9 00000000000ffba0
88500 clk cpu0 IT (325) 00210f5c b9000920 O EL3h_s : STR X0, [X9, #8]
88500 clk cpu0 MW4 000ffba8:0000000ffba8 00000020
88750 clk cpu0 IT (326) 00210f60 52800028 O EL3h_s : MOVZ W8, #1, #0
88750 clk cpu0 R W8 00000001
89000 clk cpu0 IT (327) 00210f64 39003128 O EL3h_s : STRB W8, [W9, #12]
89000 clk cpu0 MW1 000ffbac:0000000ffbac 01
89500 clk cpu0 IT (328) 00210f68 a9417bfd O EL3h_s : LDP
89500 clk cpu0 MW16 000ffb00:0000000ffb00 00000000000000000000000000210f08
89500 clk cpu0 R X29 00000000000ffb30
89500 clk cpu0 R X30 0000000000210f08
89750 clk cpu0 IT (329) 00210f6c 910083ff O EL3h_s : ADD SP, SP, #32
90000 clk cpu0 IT (330) 00210f70 d65f03c0 O EL3h_s : RET
90250 clk cpu0 IT (331) 00210f08 17ffffcb O EL3h_s : B 0X210E34
90500 clk cpu0 IT (332) 00210e34 f94007e8 O EL3h_s : LDR X8, [SP, #8]
90500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
90500 clk cpu0 R X8 00000000000ffba0
90750 clk cpu0 IT (333) 00210e38 b9400908 O EL3h_s : LDR X8, [X8, #8]
90750 clk cpu0 MR4 000ffba8:0000000ffba8 00000020
90750 clk cpu0 R X8 0000000000000020
91000 clk cpu0 IT (334) 00210e3c 7100c108 O EL3h_s : SUBS W8, W8, #48
91000 clk cpu0 R W8 fffffff0
91000 clk cpu0 R cpsr 800003cd
91250 clk cpu0 IT (335) 00210e40 5400014b O EL3h_s : B.LT 0X210E68
91500 clk cpu0 IT (336) 00210e68 f94007e8 O EL3h_s : LDR X8, [SP, #8]
91500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
91500 clk cpu0 R X8 00000000000ffba0
91750 clk cpu0 IT (337) 00210e6c b9400908 O EL3h_s : LDR X8, [X8, #8]
91750 clk cpu0 MR4 000ffba8:0000000ffba8 00000020
91750 clk cpu0 R X8 0000000000000020
92000 clk cpu0 IT (338) 00210e70 71010508 O EL3h_s : SUBS W8, W8, #65
92000 clk cpu0 R W8 ffffffdf
92000 clk cpu0 R cpsr 800003cd
92250 clk cpu0 IT (339) 00210e74 5400014b O EL3h_s : B.LT 0X210E68
92500 clk cpu0 IT (340) 00210e9c f94007e8 O EL3h_s : LDR X8, [SP, #8]
92500 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
92500 clk cpu0 R X8 00000000000ffba0
92750 clk cpu0 IT (341) 00210ea0 b9400908 O EL3h_s : LDR X8, [X8, #8]
92750 clk cpu0 MR4 000ffba8:0000000ffba8 00000020
92750 clk cpu0 R X8 0000000000000020
93000 clk cpu0 IT (342) 00210ea4 71018508 O EL3h_s : SUBS W8, W8, #97
93000 clk cpu0 R W8 ffffffbf
93000 clk cpu0 R cpsr 800003cd
93250 clk cpu0 IT (343) 00210ea8 5400014b O EL3h_s : B.LT 0X210E68
93500 clk cpu0 IT (344) 00210ed0 1400000f O EL3h_s : B 0X210F0C
93750 clk cpu0 IT (345) 00210f0c f94007e9 O EL3h_s : LDR X9, [SP, #8]
93750 clk cpu0 MR8 000ffb18:0000000ffb18 00000000000ffba0
93750 clk cpu0 R X9 00000000000ffba0
94000 clk cpu0 IT (346) 00210f10 52802028 O EL3h_s : MOVZ W8, #257, #0
94000 clk cpu0 R W8 00000101
94250 clk cpu0 IT (347) 00210f14 b9001128 O EL3h_s : STR X8, [X9, #16]
94250 clk cpu0 MW4 000ffbb0:0000000ffbb0 00000101
94500 clk cpu0 IT (348) 00210f18 14000005 O EL3h_s : B 0X210F2C
95000 clk cpu0 IT (349) 00210f2c a9427bfd O EL3h_s : LDP
95000 clk cpu0 MW16 000ffb30:0000000ffb30 00000000000000000000000000210c1c
95000 clk cpu0 R X29 00000000000ffb50
95000 clk cpu0 R X30 0000000000210c1c
95250 clk cpu0 IT (350) 00210f30 9100c3ff O EL3h_s : ADD SP, SP, #48
95500 clk cpu0 IT (351) 00210f34 d65f03c0 O EL3h_s : RET
96000 clk cpu0 IT (352) 00210c1c a9417bfd O EL3h_s : LDP
96000 clk cpu0 MW16 000ffb50:0000000ffb50 00000000000000000000000000210b30
96000 clk cpu0 R X29 00000000000ffb70
96000 clk cpu0 R X30 0000000000210b30
96250 clk cpu0 IT (353) 00210c20 910083ff O EL3h_s : ADD SP, SP, #32
96500 clk cpu0 IT (354) 00210c24 d65f03c0 O EL3h_s : RET
97000 clk cpu0 IT (355) 00210b30 a9417bfd O EL3h_s : LDP
97000 clk cpu0 MW16 000ffb70:0000000ffb70 00000000000000000000000000210a0c
97000 clk cpu0 R X29 00000000000fffe0
97000 clk cpu0 R X30 0000000000210a0c
97250 clk cpu0 IT (356) 00210b34 910083ff O EL3h_s : ADD SP, SP, #32
97500 clk cpu0 IT (357) 00210b38 d65f03c0 O EL3h_s : RET
97750 clk cpu0 IT (358) 00210a0c b94033e8 O EL3h_s : LDR X8, [SP, #48]
97750 clk cpu0 MR4 000ffbb0:0000000ffbb0 00000101
97750 clk cpu0 R X8 0000000000000101
98000 clk cpu0 IT (359) 00210a10 71040108 O EL3h_s : SUBS W8, W8, #256
98000 clk cpu0 R W8 00000001
98000 clk cpu0 R cpsr 200003cd
98250 clk cpu0 IT (360) 00210a14 54000080 O EL3h_s : B.EQ 0X210A24
98500 clk cpu0 IT (361) 00210a18 910043e0 O EL3h_s : ADD X0, SP, #16
98500 clk cpu0 R X0 00000000000ffb90
98750 clk cpu0 IT (362) 00210a1c 94000048 O EL3h_s : BL 0X210B3C
98750 clk cpu0 R X30 0000000000210a20
99000 clk cpu0 IT (363) 00210b3c d100c3ff O EL3h_s : SUB SP, SP, #48
99750 clk cpu0 IT (364) 00210b40 a9027bfd O EL3h_s : STP
99750 clk cpu0 MW8 000ffb70:0000000ffb70 00000000000fffe0
99750 clk cpu0 MW8 000ffb78:0000000ffb78 0000000000210a20
100000 clk cpu0 IT (365) 00210b44 910083fd O EL3h_s : ADD X29, SP, #32
100000 clk cpu0 R X29 00000000000ffb70
100250 clk cpu0 IT (366) 00210b48 f81f83a0 O EL3h_s : STUR X0, [X29, #-8]
100250 clk cpu0 MW8 000ffb68:0000000ffb68 00000000000ffb90
100500 clk cpu0 IT (367) 00210b4c f85f83a0 O EL3h_s : LDUR X0, [X29, #-8]
100500 clk cpu0 MR8 000ffb68:0000000ffb68 00000000000ffb90
100500 clk cpu0 R X0 00000000000ffb90
100750 clk cpu0 IT (368) 00210b50 f90007e0 O EL3h_s : STR X0, [SP, #8]
100750 clk cpu0 MW8 000ffb58:0000000ffb58 00000000000ffb90
101000 clk cpu0 IT (369) 00210b54 d10033a1 O EL3h_s : SUB X1, X29, #12
101000 clk cpu0 R X1 00000000000ffb64
101250 clk cpu0 IT (370) 00210b58 94000138 O EL3h_s : BL 0X211038
101250 clk cpu0 R X30 0000000000210b5c
101500 clk cpu0 IT (371) 00211038 d100c3ff O EL3h_s : SUB SP, SP, #48
102250 clk cpu0 IT (372) 0021103c a9027bfd O EL3h_s : STP
102250 clk cpu0 MW8 000ffb40:0000000ffb40 00000000000ffb70
102250 clk cpu0 MW8 000ffb48:0000000ffb48 0000000000210b5c
102500 clk cpu0 IT (373) 00211040 910083fd O EL3h_s : ADD X29, SP, #32
102500 clk cpu0 R X29 00000000000ffb40
102750 clk cpu0 IT (374) 00211044 f9000be0 O EL3h_s : STR X0, [SP, #16]
102750 clk cpu0 MW8 000ffb30:0000000ffb30 00000000000ffb90
103000 clk cpu0 IT (375) 00211048 f90007e1 O EL3h_s : STR X1, [SP, #8]
103000 clk cpu0 MW8 000ffb28:0000000ffb28 00000000000ffb64
103250 clk cpu0 IT (376) 0021104c f9400be0 O EL3h_s : LDR X0, [SP, #16]
103250 clk cpu0 MR8 000ffb30:0000000ffb30 00000000000ffb90
103250 clk cpu0 R X0 00000000000ffb90
103500 clk cpu0 IT (377) 00211050 f90003e0 O EL3h_s : STR X0, [SP]
103500 clk cpu0 MW8 000ffb20:0000000ffb20 00000000000ffb90
103750 clk cpu0 IT (378) 00211054 f94007e1 O EL3h_s : LDR X1, [SP, #8]
103750 clk cpu0 MR8 000ffb28:0000000ffb28 00000000000ffb64
103750 clk cpu0 R X1 00000000000ffb64
104000 clk cpu0 IT (379) 00211058 9400001b O EL3h_s : BL 0X2110C4
104000 clk cpu0 R X30 000000000021105c
104250 clk cpu0 IT (380) 002110c4 d10103ff O EL3h_s : SUB SP, SP, #64
105000 clk cpu0 IT (381) 002110c8 a9037bfd O EL3h_s : STP
105000 clk cpu0 MW8 000ffb10:0000000ffb10 00000000000ffb40
105000 clk cpu0 MW8 000ffb18:0000000ffb18 000000000021105c
105250 clk cpu0 IT (382) 002110cc 9100c3fd O EL3h_s : ADD X29, SP, #48
105250 clk cpu0 R X29 00000000000ffb10
105500 clk cpu0 IT (383) 002110d0 f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
105500 clk cpu0 MW8 000ffb00:0000000ffb00 00000000000ffb90
105750 clk cpu0 IT (384) 002110d4 f9000fe1 O EL3h_s : STR X1, [SP, #24]
105750 clk cpu0 MW8 000ffaf8:0000000ffaf8 00000000000ffb64
106000 clk cpu0 IT (385) 002110d8 f85f03a0 O EL3h_s : LDUR X0, [X29, #-16]
106000 clk cpu0 MR8 000ffb00:0000000ffb00 00000000000ffb90
106000 clk cpu0 R X0 00000000000ffb90
106250 clk cpu0 IT (386) 002110dc f90007e0 O EL3h_s : STR X0, [SP, #8]
106250 clk cpu0 MW8 000ffae8:0000000ffae8 00000000000ffb90
106500 clk cpu0 IT (387) 002110e0 f9400fe1 O EL3h_s : LDR X1, [SP, #24]
106500 clk cpu0 MR8 000ffaf8:0000000ffaf8 00000000000ffb64
106500 clk cpu0 R X1 00000000000ffb64
106750 clk cpu0 IT (388) 002110e4 94000043 O EL3h_s : BL 0X2111F0
106750 clk cpu0 R X30 00000000002110e8
107000 clk cpu0 IT (389) 002111f0 d10103ff O EL3h_s : SUB SP, SP, #64
107750 clk cpu0 IT (390) 002111f4 a9037bfd O EL3h_s : STP
107750 clk cpu0 MW8 000ffad0:0000000ffad0 00000000000ffb10
107750 clk cpu0 MW8 000ffad8:0000000ffad8 00000000002110e8
108000 clk cpu0 IT (391) 002111f8 9100c3fd O EL3h_s : ADD X29, SP, #48
108000 clk cpu0 R X29 00000000000ffad0
108250 clk cpu0 IT (392) 002111fc f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
108250 clk cpu0 MW8 000ffac0:0000000ffac0 00000000000ffb90
108500 clk cpu0 IT (393) 00211200 f9000fe1 O EL3h_s : STR X1, [SP, #24]
108500 clk cpu0 MW8 000ffab8:0000000ffab8 00000000000ffb64
108750 clk cpu0 IT (394) 00211204 f85f03a0 O EL3h_s : LDUR X0, [X29, #-16]
108750 clk cpu0 MR8 000ffac0:0000000ffac0 00000000000ffb90
108750 clk cpu0 R X0 00000000000ffb90
109000 clk cpu0 IT (395) 00211208 f90007e0 O EL3h_s : STR X0, [SP, #8]
109000 clk cpu0 MW8 000ffaa8:0000000ffaa8 00000000000ffb90
109250 clk cpu0 IT (396) 0021120c f9400fe1 O EL3h_s : LDR X1, [SP, #24]
109250 clk cpu0 MR8 000ffab8:0000000ffab8 00000000000ffb64
109250 clk cpu0 R X1 00000000000ffb64
109500 clk cpu0 IT (397) 00211210 94000024 O EL3h_s : BL 0X2112A0
109500 clk cpu0 R X30 0000000000211214
109750 clk cpu0 IT (398) 002112a0 d10103ff O EL3h_s : SUB SP, SP, #64
110500 clk cpu0 IT (399) 002112a4 a9037bfd O EL3h_s : STP
110500 clk cpu0 MW8 000ffa90:0000000ffa90 00000000000ffad0
110500 clk cpu0 MW8 000ffa98:0000000ffa98 0000000000211214
110750 clk cpu0 IT (400) 002112a8 9100c3fd O EL3h_s : ADD X29, SP, #48
110750 clk cpu0 R X29 00000000000ffa90
111000 clk cpu0 IT (401) 002112ac f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
111000 clk cpu0 MW8 000ffa80:0000000ffa80 00000000000ffb90
111250 clk cpu0 IT (402) 002112b0 f9000fe1 O EL3h_s : STR X1, [SP, #24]
111250 clk cpu0 MW8 000ffa78:0000000ffa78 00000000000ffb64
111500 clk cpu0 IT (403) 002112b4 f85f03a0 O EL3h_s : LDUR X0, [X29, #-16]
111500 clk cpu0 MR8 000ffa80:0000000ffa80 00000000000ffb90
111500 clk cpu0 R X0 00000000000ffb90
111750 clk cpu0 IT (404) 002112b8 f90007e0 O EL3h_s : STR X0, [SP, #8]
111750 clk cpu0 MW8 000ffa68:0000000ffa68 00000000000ffb90
112000 clk cpu0 IT (405) 002112bc f9400fe1 O EL3h_s : LDR X1, [SP, #24]
112000 clk cpu0 MR8 000ffa78:0000000ffa78 00000000000ffb64
112000 clk cpu0 R X1 00000000000ffb64
112250 clk cpu0 IT (406) 002112c0 9400002e O EL3h_s : BL 0X211378
112250 clk cpu0 R X30 00000000002112c4
112500 clk cpu0 IT (407) 00211378 d10103ff O EL3h_s : SUB SP, SP, #64
113250 clk cpu0 IT (408) 0021137c a9037bfd O EL3h_s : STP
113250 clk cpu0 MW8 000ffa50:0000000ffa50 00000000000ffa90
113250 clk cpu0 MW8 000ffa58:0000000ffa58 00000000002112c4
113500 clk cpu0 IT (409) 00211380 9100c3fd O EL3h_s : ADD X29, SP, #48
113500 clk cpu0 R X29 00000000000ffa50
113750 clk cpu0 IT (410) 00211384 f81f03a0 O EL3h_s : STUR X0, [X29, #-16]
113750 clk cpu0 MW8 000ffa40:0000000ffa40 00000000000ffb90
114000 clk cpu0 IT (411) 00211388 f9000fe1 O EL3h_s : STR X1, [SP, #24]
114000 clk cpu0 MW8 000ffa38:0000000ffa38 00000000000ffb64
114250 clk cpu0 IT (412) 0021138c f85f03a8 O EL3h_s : LDUR X8, [X29, #-16]
114250 clk cpu0 MR8 000ffa40:0000000ffa40 00000000000ffb90
114250 clk cpu0 R X8 00000000000ffb90
114500 clk cpu0 IT (413) 00211390 f90007e8 O EL3h_s : STR X8, [SP, #8]
114500 clk cpu0 MW8 000ffa28:0000000ffa28 00000000000ffb90
114750 clk cpu0 IT (414) 00211394 f9400108 O EL3h_s : LDR X8, [X8]
114750 clk cpu0 MR8 000ffb90:0000000ffb90 00000000000ffba0
114750 clk cpu0 R X8 00000000000ffba0
115000 clk cpu0 IT (415) 00211398 b9401108 O EL3h_s : LDR X8, [X8, #16]
115000 clk cpu0 MR4 000ffbb0:0000000ffbb0 00000101
115000 clk cpu0 R X8 0000000000000101
115250 clk cpu0 IT (416) 0021139c 71040508 O EL3h_s : SUBS W8, W8, #257
115250 clk cpu0 R W8 00000000
115250 clk cpu0 R cpsr 600003cd
115500 clk cpu0 IT (417) 002113a0 54000181 O EL3h_s : B.NE 0X2113D0
115750 clk cpu0 IT (418) 002113a4 f94007e8 O EL3h_s : LDR X8, [SP, #8]
115750 clk cpu0 MR8 000ffa28:0000000ffa28 00000000000ffb90
115750 clk cpu0 R X8 00000000000ffb90
116000 clk cpu0 IT (419) 002113a8 f9400109 O EL3h_s : LDR X9, [X8]
116000 clk cpu0 MR8 000ffb90:0000000ffb90 00000000000ffba0
116000 clk cpu0 R X9 00000000000ffba0
116250 clk cpu0 IT (420) 002113ac b9401529 O EL3h_s : LDR X9, [X9, #20]
116250 clk cpu0 MR4 000ffbb4:0000000ffbb4 00000016
116250 clk cpu0 R X9 0000000000000016
116500 clk cpu0 IT (421) 002113b0 f9400fea O EL3h_s : LDR X10, [SP, #24]
116500 clk cpu0 MR8 000ffa38:0000000ffa38 00000000000ffb64
116500 clk cpu0 R X10 00000000000ffb64
116750 clk cpu0 IT (422) 002113b4 b9000149 O EL3h_s : STR X9, [X10]
116750 clk cpu0 MW4 000ffb64:0000000ffb64 00000016
117000 clk cpu0 IT (423) 002113b8 f9400100 O EL3h_s : LDR X0, [X8]
117000 clk cpu0 MR8 000ffb90:0000000ffb90 00000000000ffba0
117000 clk cpu0 R X0 00000000000ffba0
117250 clk cpu0 IT (424) 002113bc 97fffe12 O EL3h_s : BL 0X210C04
117250 clk cpu0 R X30 00000000002113c0
117500 clk cpu0 IT (425) 00210c04 d10083ff O EL3h_s : SUB SP, SP, #32
118250 clk cpu0 IT (426) 00210c08 a9017bfd O EL3h_s : STP
118250 clk cpu0 MW8 000ffa10:0000000ffa10 00000000000ffa50
118250 clk cpu0 MW8 000ffa18:0000000ffa18 00000000002113c0
118500 clk cpu0 IT (427) 00210c0c 910043fd O EL3h_s : ADD X29, SP, #16
118500 clk cpu0 R X29 00000000000ffa10
118750 clk cpu0 IT (428) 00210c10 f90007e0 O EL3h_s : STR X0, [SP, #8]
118750 clk cpu0 MW8 000ffa08:0000000ffa08 00000000000ffba0
119000 clk cpu0 IT (429) 00210c14 f94007e0 O EL3h_s : LDR X0, [SP, #8]
119000 clk cpu0 MR8 000ffa08:0000000ffa08 00000000000ffba0
119000 clk cpu0 R X0 00000000000ffba0
119250 clk cpu0 IT (430) 00210c18 94000004 O EL3h_s : BL 0X210C28
119250 clk cpu0 R X30 0000000000210c1c
119500 clk cpu0 IT (431) 00210c28 d100c3ff O EL3h_s : SUB SP, SP, #48
120250 clk cpu0 IT (432) 00210c2c a9027bfd O EL3h_s : STP
120250 clk cpu0 MW8 000ff9f0:0000000ff9f0 00000000000ffa10
120250 clk cpu0 MW8 000ff9f8:0000000ff9f8 0000000000210c1c
120500 clk cpu0 IT (433) 00210c30 910083fd O EL3h_s : ADD X29, SP, #32
120500 clk cpu0 R X29 00000000000ff9f0
120750 clk cpu0 IT (434) 00210c34 f81f83a0 O EL3h_s : STUR X0, [X29, #-8]
120750 clk cpu0 MW8 000ff9e8:0000000ff9e8 00000000000ffba0
121000 clk cpu0 IT (435) 00210c38 f85f83a8 O EL3h_s : LDUR X8, [X29, #-8]
121000 clk cpu0 MR8 000ff9e8:0000000ff9e8 00000000000ffba0
121000 clk cpu0 R X8 00000000000ffba0
121250 clk cpu0 IT (436) 00210c3c f90007e8 O EL3h_s : STR X8, [SP, #8]
121250 clk cpu0 MW8 000ff9d8:0000000ff9d8 00000000000ffba0
121500 clk cpu0 IT (437) 00210c40 39403108 O EL3h_s : LDRB W8, [W8, #12]
121500 clk cpu0 MR1 000ffbac:0000000ffbac 01
121500 clk cpu0 R W8 00000001
121750 clk cpu0 IT (438) 00210c44 37000068 O EL3h_s : TBNZ W8, #0X1, 0X210C50
122000 clk cpu0 IT (439) 00210c50 f94007e8 O EL3h_s : LDR X8, [SP, #8]
122000 clk cpu0 MR8 000ff9d8:0000000ff9d8 00000000000ffba0
122000 clk cpu0 R X8 00000000000ffba0
122250 clk cpu0 IT (440) 00210c54 b9400909 O EL3h_s : LDR X9, [X8, #8]
122250 clk cpu0 MR4 000ffba8:0000000ffba8 00000020
122250 clk cpu0 R X9 0000000000000020
122500 clk cpu0 IT (441) 00210c58 52800028 O EL3h_s : MOVZ W8, #1, #0
122500 clk cpu0 R W8 00000001
122750 clk cpu0 IT (442) 00210c5c 71008129 O EL3h_s : SUBS W9, W9, #32
122750 clk cpu0 R W9 00000000
122750 clk cpu0 R cpsr 600003cd
123000 clk cpu0 IT (443) 00210c60 b90007e8 O EL3h_s : STR X8, [SP, #4]
123000 clk cpu0 MW4 000ff9d4:0000000ff9d4 00000001
123250 clk cpu0 IT (444) 00210c64 54000180 O EL3h_s : B.EQ 0X210C94
123500 clk cpu0 IT (445) 00210c94 b94007e8 O EL3h_s : LDR X8, [SP, #4]
123500 clk cpu0 MR4 000ff9d4:0000000ff9d4 00000001