Merge branch 'latest-release'

Merging changes since 2023Q2 branching back to the main branch.

Author: vhscampos

cmse/cmse.md

@@ -1,11 +1,11 @@
 ---
 title: Arm®v8-M Security Extensions <br /> Requirements on Development Tools
-version: 1.2
-date-of-issue: 06 April 2022
+version: 1.3
+date-of-issue: 04 August 2023
 set-quote-highlight: true
 # LaTeX specific variables
 copyright-text: Copyright 2019, 2021-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>.
-draftversion: true
+draftversion: false
 # Jekyll specific variables
 header_counter: true
 toc: true
@@ -121,23 +121,14 @@ Copyright 2019, 2021-2023 Arm Limited and/or its affiliates <open-source-office@
 
 ## Change control
 
-### Current status and anticipated changes
-
-This document is a development version based on release 1.1.
-
-Anticipated changes to this document include:
-
-* Typographical corrections.
-* Clarifications.
-* Compatible extensions.
-
 ### Change history
 
-| Issue | Date          | By   | Change         |
-| :---  | :---          | :--- | :---           |
-| 1.0   | 23/10/2015    | Arm  | First release  |
-| 1.1   | 01/11/2019    | Arm  | Second release |
-| 1.2   | 06 April 2022 | Arm  | See [Changes for version 1.2](#changes-for-version-1.2)|
+| Issue | Date           | By   | Change         |
+| :---  | :---           | :--- | :---           |
+| 1.0   | 23/10/2015     | Arm  | First release  |
+| 1.1   | 01/11/2019     | Arm  | Second release |
+| 1.2   | 06 April 2022  | Arm  | See [Changes for version 1.2](#changes-for-version-1.2)|
+| 1.3   | 04 August 2023 | Arm  | See [Changes for version 1.3](#changes-for-version-1.3)|
 
 #### Changes for version 1.2
 
@@ -154,14 +145,15 @@ Anticipated changes to this document include:
   NS nsfunc(struct s);` to `struct s NS (*nsfunc)(struct
   s);`. Non-secure functions have to be function pointers.
 
-#### Changes for next release
+#### Changes for version 1.3
 
 * Removed incorrect optimisation remark in section
   [Arguments on the stack and floating point handling](#arguments-on-the-stack-and-floating-point-handling).
 * Removed incorrect information about the floating-point ABI used in
   [Arguments on the stack and floating point handling](#arguments-on-the-stack-and-floating-point-handling).
 * Corrected description and example in section
   [Non-secure function pointers](#non-secure-function-pointer).
+* Fixed typos.
 
 ## References
 
@@ -1376,14 +1368,14 @@ The global variable `fp` is of a non-secure function type but can hold the
 address of a secure or non-secure function. Arm recommends that you do not
 share this variable.
 
-Since `fp` can hold either type of function, the compiler may generate code
+Since `fp` can hold either type of function, the compiler might generate code
 to save and clear registers in preparation for a security state transition even
 if the function call nevers performs such transition at run-time.
 
 To mitigate this, an nsfptr provides a way to test at run-time the
 security state that will be targeted when performing a call through
 this pointer. By using the nsfptr related intrinsics, it is
-possible to check at run-time which function call to perform and thus
+possible to check at run-time which function call to perform and therefore
 avoid unnecessary register context saving and clearing.
 
 ``` c

main/acle.md

@@ -1,10 +1,10 @@
 ---
 title: Arm C Language Extensions
-version: 2022Q4
-date-of-issue: 23 November 2022
+version: 2023Q2
+date-of-issue: 04 August 2023
 # LaTeX specific variables
 copyright-text: "Copyright: see section \\texorpdfstring{\\nameref{copyright}}{Copyright}."
-draftversion: true
+draftversion: false
 # Jekyll specific variables
 header_counter: true
 toc: true
@@ -114,7 +114,7 @@ about Arm’s trademarks.
 
 ## Copyright
 
-* Copyright 2011-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>.
+* Copyright 2011-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>.
 * Copyright 2022 Google LLC.
 
 ## About this document
@@ -175,6 +175,7 @@ unless a different support level is specified in the text.
 | 2022Q1       | 06 April 2022     | Arm    | See [Changes between ACLE Q4 2021 and ACLE Q1 2022](#changes-between-acle-q4-2021-and-acle-q1-2022)                  |
 | 2022Q2       | 01 Jul 2022       | Arm    | See [Changes between ACLE Q1 2021 and ACLE Q2 2022](#changes-between-acle-q1-2022-and-acle-q2-2022)                  |
 | 2022Q4       | 23 November 2022  | Arm    | See [Changes between ACLE Q2 2022 and ACLE Q4 2022](#changes-between-acle-q2-2022-and-acle-q4-2022)                  |
+| 2023Q2       | 04 August 2023    | Arm    | See [Changes between ACLE Q4 2022 and ACLE Q2 2023](#changes-between-acle-q4-2022-and-acle-q2-2023)                  |
 
 #### Changes between ACLE Q2 2017 and ACLE Q2 2018
 
@@ -328,7 +329,7 @@ Armv8.4-A [[ARMARMv84]](#ARMARMv84). Support is added for the Dot Product intrin
   * Renamed the feature macro to `__HAVE_FUNCTION_MULTI_VERSIONING`
   * Added some clarifications.
 
-#### Changes for next release
+#### Changes between ACLE Q4 2022 and ACLE Q2 2023
 
 * Added SLC as a valid Cache Level for the Memory prefetch intrinsics.
 * Added [support for 128-bit system registers](#special-register-intrinsics),
@@ -1552,13 +1553,13 @@ the usage of these instructions in inline assembly.
 
 If defined, the value of `__ARM_FEATURE_RCPC` remains consistent with the decimal
 value of `LRCPC` field (bits [23:20]) in the `ID_AA64ISAR1_EL1` register.
-For convenience these are reproduced here:
+For convenience these are shown below:
 
 | **Value** | **Feature** | **Instructions**                | **Availability**          |
 | --------- | ----------- | ------------------------------- | ------------------------- |
 | 1         | FEAT_LRCPC  | LDAPR* instructions             | Armv8.3, optional Armv8.2 |
 | 2         | FEAT_LRCPC2 | LDAPUR* and STLUR* instructions | Armv8.4, optional Armv8.2 |
-| 3         | FEAT_LRCPC3 | See FEAT_LRCPC3 documentation.  | Armv8.9, optional Armv8.2 |
+| 3         | FEAT_LRCPC3 | See FEAT_LRCPC3 documentation   | Armv8.9, optional Armv8.2 |
 
 The `__ARM_FEATURE_RCPC` macro can only be implemented in the AArch64
 execution state.

neon_intrinsics/advsimd.md

@@ -1,7 +1,7 @@
 ---
 title: Arm Neon Intrinsics Reference
-version: 2021Q4
-date-of-issue: 11 January 2022
+version: 2023Q2
+date-of-issue: 04 August 2023
 # LaTeX specific variables
 landscape: true
 copyright-text: "Copyright: see section \\texorpdfstring{\\nameref{copyright}}{Copyright}."
@@ -124,6 +124,7 @@ for more information about Arm’s trademarks.
 | H     | 02 July 2021      | 2021Q2               |
 | I     | 30 September 2021 | 2021Q3               |
 | J     | 11 January 2022   | 2021Q4               |
+| K     | 04 August 2023    | 2023Q2               |
 
 ### Changes between 2021Q2 and 2021Q3
 
@@ -141,6 +142,10 @@ for more information about Arm’s trademarks.
 * Added missing item for release 2021Q3 in the table with the list of
   versions in section [Document history](#document-history).
 
+### Changes between 2021Q4 and 2023Q2
+
+* Added support for FEAT_LRCPC3 LDAP1/STL1 intrinsics.
+
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neon_intrinsics/advsimd.template.md

@@ -1,7 +1,7 @@
 ---
 title: Arm Neon Intrinsics Reference
-version: 2021Q4
-date-of-issue: 11 January 2022
+version: 2023Q2
+date-of-issue: 04 August 2023
 # LaTeX specific variables
 landscape: true
 copyright-text: "Copyright: see section \\texorpdfstring{{\\nameref{{copyright}}}}{{Copyright}}."
@@ -124,6 +124,7 @@ for more information about Arm’s trademarks.
 | H     | 02 July 2021      | 2021Q2               |
 | I     | 30 September 2021 | 2021Q3               |
 | J     | 11 January 2022   | 2021Q4               |
+| K     | 04 August 2023    | 2023Q2               |
 
 ### Changes between 2021Q2 and 2021Q3
 
@@ -141,6 +142,10 @@ for more information about Arm’s trademarks.
 * Added missing item for release 2021Q3 in the table with the list of
   versions in section [Document history](#document-history).
 
+### Changes between 2021Q4 and 2023Q2
+
+* Added support for FEAT_LRCPC3 LDAP1/STL1 intrinsics.
+
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