Update (2023.08.30)

31974: LA port of 8301996: Move field resolution information out of the cpCache
31973: LA port of 8313023: Return value corrupted when using CCS + isTrivial (mainline)
30508: Add 32, 64bit vectorAPI of HF2F, F2HF

Author: loongson-jvm

src/hotspot/cpu/loongarch/assembler_loongarch.hpp

@@ -155,7 +155,7 @@ class Address {
     assert_different_registers(_base, AT);
   }
 
-  Address(Register base, Register index, ScaleFactor scale, int disp = 0)
+  Address(Register base, Register index, ScaleFactor scale = no_scale, int disp = 0)
     : _base (base),
       _index(index),
       _scale(scale),

src/hotspot/cpu/loongarch/downcallLinker_loongarch_64.cpp

@@ -166,7 +166,7 @@ void DowncallStubGenerator::generate() {
   assert(_abi._shadow_space_bytes == 0, "not expecting shadow space on LoongArch64");
   allocated_frame_size += arg_shuffle.out_arg_bytes();
 
-  bool should_save_return_value = !_needs_return_buffer && _needs_transition;
+  bool should_save_return_value = !_needs_return_buffer;
   RegSpiller out_reg_spiller(_output_registers);
   int spill_offset = -1;
 

src/hotspot/cpu/loongarch/interp_masm_loongarch.hpp

@@ -121,6 +121,7 @@ class InterpreterMacroAssembler: public MacroAssembler {
   void get_method_counters(Register method, Register mcs, Label& skip);
 
   void load_resolved_indy_entry(Register cache, Register index);
+  void load_field_entry(Register cache, Register index, int bcp_offset = 1);
 
   // load cpool->resolved_references(index);
   void load_resolved_reference_at_index(Register result, Register index, Register tmp);

src/hotspot/cpu/loongarch/interp_masm_loongarch_64.cpp

@@ -31,8 +31,9 @@
 #include "interpreter/interpreterRuntime.hpp"
 #include "oops/arrayOop.hpp"
 #include "oops/markWord.hpp"
-#include "oops/methodData.hpp"
 #include "oops/method.hpp"
+#include "oops/methodData.hpp"
+#include "oops/resolvedFieldEntry.hpp"
 #include "oops/resolvedIndyEntry.hpp"
 #include "prims/jvmtiExport.hpp"
 #include "prims/jvmtiThreadState.hpp"
@@ -330,12 +331,29 @@ void InterpreterMacroAssembler::load_resolved_indy_entry(Register cache, Registe
   // Get address of invokedynamic array
   ld_d(cache, FP, frame::interpreter_frame_cache_offset * wordSize);
   ld_d(cache, Address(cache, in_bytes(ConstantPoolCache::invokedynamic_entries_offset())));
-  // Scale the index to be the entry index * sizeof(ResolvedInvokeDynamicInfo)
+  // Scale the index to be the entry index * sizeof(ResolvedIndyEntry)
   slli_d(index, index, log2i_exact(sizeof(ResolvedIndyEntry)));
   addi_d(cache, cache, Array<ResolvedIndyEntry>::base_offset_in_bytes());
   add_d(cache, cache, index);
 }
 
+void InterpreterMacroAssembler::load_field_entry(Register cache, Register index, int bcp_offset) {
+  // Get index out of bytecode pointer
+  get_cache_index_at_bcp(index, bcp_offset, sizeof(u2));
+  // Take shortcut if the size is a power of 2
+  if (is_power_of_2(sizeof(ResolvedFieldEntry))) {
+    slli_d(index, index, log2i_exact(sizeof(ResolvedFieldEntry))); // Scale index by power of 2
+  } else {
+    li(cache, sizeof(ResolvedFieldEntry));
+    mul_d(index, index, cache); // Scale the index to be the entry index * sizeof(ResolvedIndyEntry)
+  }
+  ld_d(cache, FP, frame::interpreter_frame_cache_offset * wordSize);
+  // Get address of field entries array
+  ld_d(cache, Address(cache, ConstantPoolCache::field_entries_offset()));
+  addi_d(cache, cache, Array<ResolvedIndyEntry>::base_offset_in_bytes());
+  add_d(cache, cache, index);
+}
+
 // Load object from cpool->resolved_references(index)
 void InterpreterMacroAssembler::load_resolved_reference_at_index(
                                            Register result, Register index, Register tmp) {

src/hotspot/cpu/loongarch/loongarch_64.ad

@@ -14590,26 +14590,36 @@ instruct cvtVD(vReg dst, vReg src) %{
 
 // ---------------------------- Vector Cast HF2F -------------------------------
 
-instruct cvt8HFto8F(vReg dst, vReg src) %{
-  predicate(Matcher::vector_length(n) == 8);
+instruct cvtHFtoF(vReg dst, vReg src) %{
   match(Set dst (VectorCastHF2F src));
-  format %{ "(x)vconvert    $dst, $src\t# @cvt8HFto8F" %}
+  format %{ "(x)vconvert    $dst, $src\t# @cvtHFtoF" %}
   ins_encode %{
-    __ xvpermi_d($dst$$FloatRegister, $src$$FloatRegister, 0b01010000);
-    __ xvfcvtl_s_h($dst$$FloatRegister, $dst$$FloatRegister);
+    switch(Matcher::vector_length(this)) {
+      case 2:
+      case 4: __  vfcvtl_s_h($dst$$FloatRegister, $src$$FloatRegister); break;
+      case 8: __ xvpermi_d($dst$$FloatRegister, $src$$FloatRegister, 0b01010000);
+              __ xvfcvtl_s_h($dst$$FloatRegister, $dst$$FloatRegister); break;
+      default:
+        ShouldNotReachHere();
+    }
   %}
   ins_pipe( pipe_slow );
 %}
 
 // ---------------------------- Vector Cast F2HF -------------------------------
 
-instruct cvt8Fto8HF(vReg dst, vReg src) %{
-  predicate(Matcher::vector_length(n) == 8);
+instruct cvtFtoHF(vReg dst, vReg src) %{
   match(Set dst (VectorCastF2HF src));
-  format %{ "(x)vconvert    $dst, $src\t# @cvt8Fto8HF" %}
+  format %{ "(x)vconvert    $dst, $src\t# @cvtFtoHF" %}
   ins_encode %{
-    __ xvfcvt_h_s($dst$$FloatRegister, $src$$FloatRegister, $src$$FloatRegister);
-    __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b11011000);
+    switch(Matcher::vector_length(this)) {
+      case 2:
+      case 4: __  vfcvt_h_s($dst$$FloatRegister, $src$$FloatRegister, $src$$FloatRegister); break;
+      case 8: __ xvfcvt_h_s($dst$$FloatRegister, $src$$FloatRegister, $src$$FloatRegister);
+              __ xvpermi_d($dst$$FloatRegister, $dst$$FloatRegister, 0b11011000); break;
+      default:
+        ShouldNotReachHere();
+    }
   %}
   ins_pipe( pipe_slow );
 %}