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kraxelkraxel
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hw/uefi: add var-service-core.c
This is the core code for guest <-> host communication. This accepts request messages from the guest, dispatches them to the service called, and sends back the response message. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-ID: <20250225163031.1409078-11-kraxel@redhat.com>
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‎hw/uefi/var-service-core.c‎

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/*
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* SPDX-License-Identifier: GPL-2.0-or-later
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*
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* uefi vars device
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*/
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#include "qemu/osdep.h"
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#include "qemu/crc32c.h"
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#include "system/dma.h"
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#include "migration/vmstate.h"
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#include "hw/uefi/var-service.h"
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#include "hw/uefi/var-service-api.h"
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#include "hw/uefi/var-service-edk2.h"
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#include "trace/trace-hw_uefi.h"
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static int uefi_vars_pre_load(void *opaque)
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{
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uefi_vars_state *uv = opaque;
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uefi_vars_clear_all(uv);
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uefi_vars_policies_clear(uv);
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g_free(uv->buffer);
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return 0;
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}
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static int uefi_vars_post_load(void *opaque, int version_id)
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{
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uefi_vars_state *uv = opaque;
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uefi_vars_update_storage(uv);
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uv->buffer = g_malloc(uv->buf_size);
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return 0;
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}
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const VMStateDescription vmstate_uefi_vars = {
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.name = "uefi-vars",
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.pre_load = uefi_vars_pre_load,
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.post_load = uefi_vars_post_load,
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.fields = (VMStateField[]) {
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VMSTATE_UINT16(sts, uefi_vars_state),
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VMSTATE_UINT32(buf_size, uefi_vars_state),
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VMSTATE_UINT32(buf_addr_lo, uefi_vars_state),
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VMSTATE_UINT32(buf_addr_hi, uefi_vars_state),
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VMSTATE_UINT32(pio_xfer_offset, uefi_vars_state),
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VMSTATE_VBUFFER_ALLOC_UINT32(pio_xfer_buffer, uefi_vars_state,
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0, NULL, buf_size),
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VMSTATE_BOOL(end_of_dxe, uefi_vars_state),
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VMSTATE_BOOL(ready_to_boot, uefi_vars_state),
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VMSTATE_BOOL(exit_boot_service, uefi_vars_state),
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VMSTATE_BOOL(policy_locked, uefi_vars_state),
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VMSTATE_UINT64(used_storage, uefi_vars_state),
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VMSTATE_QTAILQ_V(variables, uefi_vars_state, 0,
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vmstate_uefi_variable, uefi_variable, next),
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VMSTATE_QTAILQ_V(var_policies, uefi_vars_state, 0,
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vmstate_uefi_var_policy, uefi_var_policy, next),
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VMSTATE_END_OF_LIST()
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},
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};
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static uint32_t uefi_vars_cmd_mm(uefi_vars_state *uv, bool dma_mode)
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{
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hwaddr dma;
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mm_header *mhdr;
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uint64_t size;
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uint32_t retval;
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dma = uv->buf_addr_lo | ((hwaddr)uv->buf_addr_hi << 32);
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mhdr = (mm_header *) uv->buffer;
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if (!uv->buffer || uv->buf_size < sizeof(*mhdr)) {
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return UEFI_VARS_STS_ERR_BAD_BUFFER_SIZE;
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}
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/* read header */
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if (dma_mode) {
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dma_memory_read(&address_space_memory, dma,
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uv->buffer, sizeof(*mhdr),
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MEMTXATTRS_UNSPECIFIED);
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} else {
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memcpy(uv->buffer, uv->pio_xfer_buffer, sizeof(*mhdr));
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}
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if (uadd64_overflow(sizeof(*mhdr), mhdr->length, &size)) {
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return UEFI_VARS_STS_ERR_BAD_BUFFER_SIZE;
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}
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if (uv->buf_size < size) {
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return UEFI_VARS_STS_ERR_BAD_BUFFER_SIZE;
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}
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/* read buffer (excl header) */
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if (dma_mode) {
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dma_memory_read(&address_space_memory, dma + sizeof(*mhdr),
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uv->buffer + sizeof(*mhdr), mhdr->length,
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MEMTXATTRS_UNSPECIFIED);
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} else {
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memcpy(uv->buffer + sizeof(*mhdr),
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uv->pio_xfer_buffer + sizeof(*mhdr),
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mhdr->length);
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}
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memset(uv->buffer + size, 0, uv->buf_size - size);
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/* dispatch */
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if (qemu_uuid_is_equal(&mhdr->guid, &EfiSmmVariableProtocolGuid)) {
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retval = uefi_vars_mm_vars_proto(uv);
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} else if (qemu_uuid_is_equal(&mhdr->guid, &VarCheckPolicyLibMmiHandlerGuid)) {
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retval = uefi_vars_mm_check_policy_proto(uv);
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} else if (qemu_uuid_is_equal(&mhdr->guid, &EfiEndOfDxeEventGroupGuid)) {
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trace_uefi_event("end-of-dxe");
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uv->end_of_dxe = true;
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retval = UEFI_VARS_STS_SUCCESS;
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} else if (qemu_uuid_is_equal(&mhdr->guid, &EfiEventReadyToBootGuid)) {
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trace_uefi_event("ready-to-boot");
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uv->ready_to_boot = true;
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retval = UEFI_VARS_STS_SUCCESS;
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} else if (qemu_uuid_is_equal(&mhdr->guid, &EfiEventExitBootServicesGuid)) {
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trace_uefi_event("exit-boot-service");
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uv->exit_boot_service = true;
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retval = UEFI_VARS_STS_SUCCESS;
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} else {
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retval = UEFI_VARS_STS_ERR_NOT_SUPPORTED;
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}
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/* write buffer */
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if (dma_mode) {
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dma_memory_write(&address_space_memory, dma,
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uv->buffer, sizeof(*mhdr) + mhdr->length,
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MEMTXATTRS_UNSPECIFIED);
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} else {
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memcpy(uv->pio_xfer_buffer + sizeof(*mhdr),
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uv->buffer + sizeof(*mhdr),
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sizeof(*mhdr) + mhdr->length);
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}
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return retval;
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}
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static void uefi_vars_soft_reset(uefi_vars_state *uv)
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{
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g_free(uv->buffer);
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uv->buffer = NULL;
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uv->buf_size = 0;
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uv->buf_addr_lo = 0;
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uv->buf_addr_hi = 0;
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}
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void uefi_vars_hard_reset(uefi_vars_state *uv)
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{
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trace_uefi_hard_reset();
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uefi_vars_soft_reset(uv);
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uv->end_of_dxe = false;
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uv->ready_to_boot = false;
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uv->exit_boot_service = false;
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uv->policy_locked = false;
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uefi_vars_clear_volatile(uv);
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uefi_vars_policies_clear(uv);
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uefi_vars_auth_init(uv);
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}
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static uint32_t uefi_vars_cmd(uefi_vars_state *uv, uint32_t cmd)
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{
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switch (cmd) {
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case UEFI_VARS_CMD_RESET:
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uefi_vars_soft_reset(uv);
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return UEFI_VARS_STS_SUCCESS;
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case UEFI_VARS_CMD_DMA_MM:
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return uefi_vars_cmd_mm(uv, true);
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case UEFI_VARS_CMD_PIO_MM:
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return uefi_vars_cmd_mm(uv, false);
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case UEFI_VARS_CMD_PIO_ZERO_OFFSET:
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uv->pio_xfer_offset = 0;
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return UEFI_VARS_STS_SUCCESS;
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default:
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return UEFI_VARS_STS_ERR_NOT_SUPPORTED;
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}
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}
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static uint64_t uefi_vars_read(void *opaque, hwaddr addr, unsigned size)
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{
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uefi_vars_state *uv = opaque;
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uint64_t retval = -1;
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void *xfer_ptr;
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trace_uefi_reg_read(addr, size);
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switch (addr) {
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case UEFI_VARS_REG_MAGIC:
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retval = UEFI_VARS_MAGIC_VALUE;
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break;
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case UEFI_VARS_REG_CMD_STS:
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retval = uv->sts;
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break;
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case UEFI_VARS_REG_BUFFER_SIZE:
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retval = uv->buf_size;
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break;
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case UEFI_VARS_REG_DMA_BUFFER_ADDR_LO:
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retval = uv->buf_addr_lo;
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break;
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case UEFI_VARS_REG_DMA_BUFFER_ADDR_HI:
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retval = uv->buf_addr_hi;
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break;
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case UEFI_VARS_REG_PIO_BUFFER_TRANSFER:
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if (uv->pio_xfer_offset + size > uv->buf_size) {
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retval = 0;
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break;
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}
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xfer_ptr = uv->pio_xfer_buffer + uv->pio_xfer_offset;
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switch (size) {
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case 1:
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retval = *(uint8_t *)xfer_ptr;
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break;
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case 2:
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retval = *(uint16_t *)xfer_ptr;
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break;
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case 4:
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retval = *(uint32_t *)xfer_ptr;
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break;
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case 8:
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retval = *(uint64_t *)xfer_ptr;
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break;
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}
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uv->pio_xfer_offset += size;
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break;
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case UEFI_VARS_REG_PIO_BUFFER_CRC32C:
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retval = crc32c(0xffffffff, uv->pio_xfer_buffer, uv->pio_xfer_offset);
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break;
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case UEFI_VARS_REG_FLAGS:
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retval = 0;
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if (uv->use_pio) {
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retval |= UEFI_VARS_FLAG_USE_PIO;
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}
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}
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return retval;
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}
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static void uefi_vars_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
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{
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uefi_vars_state *uv = opaque;
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void *xfer_ptr;
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trace_uefi_reg_write(addr, val, size);
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switch (addr) {
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case UEFI_VARS_REG_CMD_STS:
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uv->sts = uefi_vars_cmd(uv, val);
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break;
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case UEFI_VARS_REG_BUFFER_SIZE:
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if (val > MAX_BUFFER_SIZE) {
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val = MAX_BUFFER_SIZE;
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}
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uv->buf_size = val;
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g_free(uv->buffer);
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g_free(uv->pio_xfer_buffer);
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uv->buffer = g_malloc(uv->buf_size);
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uv->pio_xfer_buffer = g_malloc(uv->buf_size);
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break;
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case UEFI_VARS_REG_DMA_BUFFER_ADDR_LO:
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uv->buf_addr_lo = val;
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break;
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case UEFI_VARS_REG_DMA_BUFFER_ADDR_HI:
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uv->buf_addr_hi = val;
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break;
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case UEFI_VARS_REG_PIO_BUFFER_TRANSFER:
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if (uv->pio_xfer_offset + size > uv->buf_size) {
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break;
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}
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xfer_ptr = uv->pio_xfer_buffer + uv->pio_xfer_offset;
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switch (size) {
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case 1:
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*(uint8_t *)xfer_ptr = val;
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break;
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case 2:
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*(uint16_t *)xfer_ptr = val;
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break;
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case 4:
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*(uint32_t *)xfer_ptr = val;
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break;
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case 8:
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*(uint64_t *)xfer_ptr = val;
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break;
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}
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uv->pio_xfer_offset += size;
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break;
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case UEFI_VARS_REG_PIO_BUFFER_CRC32C:
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case UEFI_VARS_REG_FLAGS:
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default:
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break;
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}
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}
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static const MemoryRegionOps uefi_vars_ops = {
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.read = uefi_vars_read,
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.write = uefi_vars_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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.impl = {
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.min_access_size = 2,
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.max_access_size = 4,
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},
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};
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void uefi_vars_init(Object *obj, uefi_vars_state *uv)
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{
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QTAILQ_INIT(&uv->variables);
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QTAILQ_INIT(&uv->var_policies);
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uv->jsonfd = -1;
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memory_region_init_io(&uv->mr, obj, &uefi_vars_ops, uv,
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"uefi-vars", UEFI_VARS_REGS_SIZE);
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}
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void uefi_vars_realize(uefi_vars_state *uv, Error **errp)
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{
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uefi_vars_json_init(uv, errp);
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uefi_vars_json_load(uv, errp);
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}

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