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target/ppc: Move VMX integer max/min instructions to decodetree.
Moving the following instructions to decodetree specification : v{max, min}{u, s}{b, h, w, d} : VX-form The changes were verified by validating that the tcg ops generated by those instructions remain the same, which were captured with the '-d in_asm,op' flag. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Chinmay Rath <rathc@linux.ibm.com> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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‎target/ppc/insn32.decode‎

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -852,6 +852,28 @@ VEXTSD2Q 000100 ..... 11011 ..... 11000000010 @VX_tb
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VNEGD 000100 ..... 00111 ..... 11000000010 @VX_tb
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VNEGW 000100 ..... 00110 ..... 11000000010 @VX_tb
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## Vector Integer Maximum/Minimum Instructions
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VMAXUB 000100 ..... ..... ..... 00000000010 @VX
858+
VMAXUH 000100 ..... ..... ..... 00001000010 @VX
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VMAXUW 000100 ..... ..... ..... 00010000010 @VX
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VMAXUD 000100 ..... ..... ..... 00011000010 @VX
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VMAXSB 000100 ..... ..... ..... 00100000010 @VX
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VMAXSH 000100 ..... ..... ..... 00101000010 @VX
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VMAXSW 000100 ..... ..... ..... 00110000010 @VX
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VMAXSD 000100 ..... ..... ..... 00111000010 @VX
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867+
VMINUB 000100 ..... ..... ..... 01000000010 @VX
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VMINUH 000100 ..... ..... ..... 01001000010 @VX
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VMINUW 000100 ..... ..... ..... 01010000010 @VX
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VMINUD 000100 ..... ..... ..... 01011000010 @VX
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VMINSB 000100 ..... ..... ..... 01100000010 @VX
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VMINSH 000100 ..... ..... ..... 01101000010 @VX
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VMINSW 000100 ..... ..... ..... 01110000010 @VX
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VMINSD 000100 ..... ..... ..... 01111000010 @VX
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## Vector Mask Manipulation Instructions
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857879
MTVSRBM 000100 ..... 10000 ..... 11001000010 @VX_tb

‎target/ppc/translate/vmx-impl.c.inc‎

Lines changed: 21 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -342,22 +342,6 @@ GEN_VXFORM_V(vsububm, MO_8, tcg_gen_gvec_sub, 0, 16);
342342
GEN_VXFORM_V(vsubuhm, MO_16, tcg_gen_gvec_sub, 0, 17);
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GEN_VXFORM_V(vsubuwm, MO_32, tcg_gen_gvec_sub, 0, 18);
344344
GEN_VXFORM_V(vsubudm, MO_64, tcg_gen_gvec_sub, 0, 19);
345-
GEN_VXFORM_V(vmaxub, MO_8, tcg_gen_gvec_umax, 1, 0);
346-
GEN_VXFORM_V(vmaxuh, MO_16, tcg_gen_gvec_umax, 1, 1);
347-
GEN_VXFORM_V(vmaxuw, MO_32, tcg_gen_gvec_umax, 1, 2);
348-
GEN_VXFORM_V(vmaxud, MO_64, tcg_gen_gvec_umax, 1, 3);
349-
GEN_VXFORM_V(vmaxsb, MO_8, tcg_gen_gvec_smax, 1, 4);
350-
GEN_VXFORM_V(vmaxsh, MO_16, tcg_gen_gvec_smax, 1, 5);
351-
GEN_VXFORM_V(vmaxsw, MO_32, tcg_gen_gvec_smax, 1, 6);
352-
GEN_VXFORM_V(vmaxsd, MO_64, tcg_gen_gvec_smax, 1, 7);
353-
GEN_VXFORM_V(vminub, MO_8, tcg_gen_gvec_umin, 1, 8);
354-
GEN_VXFORM_V(vminuh, MO_16, tcg_gen_gvec_umin, 1, 9);
355-
GEN_VXFORM_V(vminuw, MO_32, tcg_gen_gvec_umin, 1, 10);
356-
GEN_VXFORM_V(vminud, MO_64, tcg_gen_gvec_umin, 1, 11);
357-
GEN_VXFORM_V(vminsb, MO_8, tcg_gen_gvec_smin, 1, 12);
358-
GEN_VXFORM_V(vminsh, MO_16, tcg_gen_gvec_smin, 1, 13);
359-
GEN_VXFORM_V(vminsw, MO_32, tcg_gen_gvec_smin, 1, 14);
360-
GEN_VXFORM_V(vminsd, MO_64, tcg_gen_gvec_smin, 1, 15);
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GEN_VXFORM(vmrghb, 6, 0);
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GEN_VXFORM(vmrghh, 6, 1);
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GEN_VXFORM(vmrghw, 6, 2);
@@ -727,6 +711,27 @@ TRANS_FLAGS2(ALTIVEC_207, VEQV, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_eqv);
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TRANS_FLAGS2(ALTIVEC_207, VNAND, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_nand);
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TRANS_FLAGS2(ALTIVEC_207, VORC, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_orc);
729713

714+
/* Integer Max/Min operations */
715+
TRANS_FLAGS(ALTIVEC, VMAXUB, do_vector_gvec3_VX, MO_8, tcg_gen_gvec_umax);
716+
TRANS_FLAGS(ALTIVEC, VMAXUH, do_vector_gvec3_VX, MO_16, tcg_gen_gvec_umax);
717+
TRANS_FLAGS(ALTIVEC, VMAXUW, do_vector_gvec3_VX, MO_32, tcg_gen_gvec_umax);
718+
TRANS_FLAGS2(ALTIVEC_207, VMAXUD, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_umax);
719+
720+
TRANS_FLAGS(ALTIVEC, VMAXSB, do_vector_gvec3_VX, MO_8, tcg_gen_gvec_smax);
721+
TRANS_FLAGS(ALTIVEC, VMAXSH, do_vector_gvec3_VX, MO_16, tcg_gen_gvec_smax);
722+
TRANS_FLAGS(ALTIVEC, VMAXSW, do_vector_gvec3_VX, MO_32, tcg_gen_gvec_smax);
723+
TRANS_FLAGS2(ALTIVEC_207, VMAXSD, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_smax);
724+
725+
TRANS_FLAGS(ALTIVEC, VMINUB, do_vector_gvec3_VX, MO_8, tcg_gen_gvec_umin);
726+
TRANS_FLAGS(ALTIVEC, VMINUH, do_vector_gvec3_VX, MO_16, tcg_gen_gvec_umin);
727+
TRANS_FLAGS(ALTIVEC, VMINUW, do_vector_gvec3_VX, MO_32, tcg_gen_gvec_umin);
728+
TRANS_FLAGS2(ALTIVEC_207, VMINUD, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_umin);
729+
730+
TRANS_FLAGS(ALTIVEC, VMINSB, do_vector_gvec3_VX, MO_8, tcg_gen_gvec_smin);
731+
TRANS_FLAGS(ALTIVEC, VMINSH, do_vector_gvec3_VX, MO_16, tcg_gen_gvec_smin);
732+
TRANS_FLAGS(ALTIVEC, VMINSW, do_vector_gvec3_VX, MO_32, tcg_gen_gvec_smin);
733+
TRANS_FLAGS2(ALTIVEC_207, VMINSD, do_vector_gvec3_VX, MO_64, tcg_gen_gvec_smin);
734+
730735
static TCGv_vec do_vrl_mask_vec(unsigned vece, TCGv_vec vrb)
731736
{
732737
TCGv_vec t0 = tcg_temp_new_vec_matching(vrb),

‎target/ppc/translate/vmx-ops.c.inc‎

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -33,22 +33,6 @@ GEN_VXFORM_DUAL(vsubuhm, bcdsub, 0, 17, PPC_ALTIVEC, PPC_NONE),
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GEN_VXFORM_DUAL(vsubuwm, bcdus, 0, 18, PPC_ALTIVEC, PPC2_ISA300),
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GEN_VXFORM_DUAL(vsubudm, bcds, 0, 19, PPC2_ALTIVEC_207, PPC2_ISA300),
3535
GEN_VXFORM_300(bcds, 0, 27),
36-
GEN_VXFORM(vmaxub, 1, 0),
37-
GEN_VXFORM(vmaxuh, 1, 1),
38-
GEN_VXFORM(vmaxuw, 1, 2),
39-
GEN_VXFORM_207(vmaxud, 1, 3),
40-
GEN_VXFORM(vmaxsb, 1, 4),
41-
GEN_VXFORM(vmaxsh, 1, 5),
42-
GEN_VXFORM(vmaxsw, 1, 6),
43-
GEN_VXFORM_207(vmaxsd, 1, 7),
44-
GEN_VXFORM(vminub, 1, 8),
45-
GEN_VXFORM(vminuh, 1, 9),
46-
GEN_VXFORM(vminuw, 1, 10),
47-
GEN_VXFORM_207(vminud, 1, 11),
48-
GEN_VXFORM(vminsb, 1, 12),
49-
GEN_VXFORM(vminsh, 1, 13),
50-
GEN_VXFORM(vminsw, 1, 14),
51-
GEN_VXFORM_207(vminsd, 1, 15),
5236
GEN_VXFORM(vmrghb, 6, 0),
5337
GEN_VXFORM(vmrghh, 6, 1),
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GEN_VXFORM(vmrghw, 6, 2),

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