Skip to content
This repository was archived by the owner on Oct 5, 2018. It is now read-only.

Commit ffa7119

Browse files
torvaldstorvalds
committed
Merge tag 'mmc-v6.17-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC host fixes from Ulf Hansson: - mvsdio: Fix dma_unmap_sg() nents value - sdhci: Fix clock management for UHS-II - sdhci-pci-gli: Fix initialization of UHS-II for GL9767 * tag 'mmc-v6.17-rc2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: sdhci-pci-gli: GL9767: Fix initializing the UHS-II interface during a power-on mmc: sdhci-uhs2: Fix calling incorrect sdhci_set_clock() function mmc: sdhci: Move the code related to setting the clock from sdhci_set_ios_common() into sdhci_set_ios() mmc: mvsdio: Fix dma_unmap_sg() nents value
2 parents 46d2aff + 77a436c commit ffa7119

File tree

4 files changed

+87
-20
lines changed

4 files changed

+87
-20
lines changed

‎drivers/mmc/host/mvsdio.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -292,7 +292,7 @@ static u32 mvsd_finish_data(struct mvsd_host *host, struct mmc_data *data,
292292
host->pio_ptr = NULL;
293293
host->pio_size = 0;
294294
} else {
295-
dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_frags,
295+
dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
296296
mmc_get_dma_dir(data));
297297
}
298298

‎drivers/mmc/host/sdhci-pci-gli.c‎

Lines changed: 67 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -283,6 +283,8 @@
283283
#define PCIE_GLI_9767_UHS2_CTL2_ZC_VALUE 0xb
284284
#define PCIE_GLI_9767_UHS2_CTL2_ZC_CTL BIT(6)
285285
#define PCIE_GLI_9767_UHS2_CTL2_ZC_CTL_VALUE 0x1
286+
#define PCIE_GLI_9767_UHS2_CTL2_FORCE_PHY_RESETN BIT(13)
287+
#define PCIE_GLI_9767_UHS2_CTL2_FORCE_RESETN_VALUE BIT(14)
286288

287289
#define GLI_MAX_TUNING_LOOP 40
288290

@@ -1179,6 +1181,65 @@ static void gl9767_set_low_power_negotiation(struct pci_dev *pdev, bool enable)
11791181
gl9767_vhs_read(pdev);
11801182
}
11811183

1184+
static void sdhci_gl9767_uhs2_phy_reset(struct sdhci_host *host, bool assert)
1185+
{
1186+
struct sdhci_pci_slot *slot = sdhci_priv(host);
1187+
struct pci_dev *pdev = slot->chip->pdev;
1188+
u32 value, set, clr;
1189+
1190+
if (assert) {
1191+
/* Assert reset, set RESETN and clean RESETN_VALUE */
1192+
set = PCIE_GLI_9767_UHS2_CTL2_FORCE_PHY_RESETN;
1193+
clr = PCIE_GLI_9767_UHS2_CTL2_FORCE_RESETN_VALUE;
1194+
} else {
1195+
/* De-assert reset, clean RESETN and set RESETN_VALUE */
1196+
set = PCIE_GLI_9767_UHS2_CTL2_FORCE_RESETN_VALUE;
1197+
clr = PCIE_GLI_9767_UHS2_CTL2_FORCE_PHY_RESETN;
1198+
}
1199+
1200+
gl9767_vhs_write(pdev);
1201+
pci_read_config_dword(pdev, PCIE_GLI_9767_UHS2_CTL2, &value);
1202+
value |= set;
1203+
pci_write_config_dword(pdev, PCIE_GLI_9767_UHS2_CTL2, value);
1204+
value &= ~clr;
1205+
pci_write_config_dword(pdev, PCIE_GLI_9767_UHS2_CTL2, value);
1206+
gl9767_vhs_read(pdev);
1207+
}
1208+
1209+
static void __gl9767_uhs2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd)
1210+
{
1211+
u8 pwr = 0;
1212+
1213+
if (mode != MMC_POWER_OFF) {
1214+
pwr = sdhci_get_vdd_value(vdd);
1215+
if (!pwr)
1216+
WARN(1, "%s: Invalid vdd %#x\n",
1217+
mmc_hostname(host->mmc), vdd);
1218+
pwr |= SDHCI_VDD2_POWER_180;
1219+
}
1220+
1221+
if (host->pwr == pwr)
1222+
return;
1223+
1224+
host->pwr = pwr;
1225+
1226+
if (pwr == 0) {
1227+
sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1228+
} else {
1229+
sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1230+
1231+
pwr |= SDHCI_POWER_ON;
1232+
sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL);
1233+
usleep_range(5000, 6250);
1234+
1235+
/* Assert reset */
1236+
sdhci_gl9767_uhs2_phy_reset(host, true);
1237+
pwr |= SDHCI_VDD2_POWER_ON;
1238+
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1239+
usleep_range(5000, 6250);
1240+
}
1241+
}
1242+
11821243
static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)
11831244
{
11841245
struct sdhci_pci_slot *slot = sdhci_priv(host);
@@ -1205,6 +1266,11 @@ static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)
12051266
}
12061267

12071268
sdhci_enable_clk(host, clk);
1269+
1270+
if (mmc_card_uhs2(host->mmc))
1271+
/* De-assert reset */
1272+
sdhci_gl9767_uhs2_phy_reset(host, false);
1273+
12081274
gl9767_set_low_power_negotiation(pdev, true);
12091275
}
12101276

@@ -1476,7 +1542,7 @@ static void sdhci_gl9767_set_power(struct sdhci_host *host, unsigned char mode,
14761542
gl9767_vhs_read(pdev);
14771543

14781544
sdhci_gli_overcurrent_event_enable(host, false);
1479-
sdhci_uhs2_set_power(host, mode, vdd);
1545+
__gl9767_uhs2_set_power(host, mode, vdd);
14801546
sdhci_gli_overcurrent_event_enable(host, true);
14811547
} else {
14821548
gl9767_vhs_write(pdev);

‎drivers/mmc/host/sdhci-uhs2.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -295,7 +295,8 @@ static void __sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
295295
else
296296
sdhci_uhs2_set_power(host, ios->power_mode, ios->vdd);
297297

298-
sdhci_set_clock(host, host->clock);
298+
host->ops->set_clock(host, ios->clock);
299+
host->clock = ios->clock;
299300
}
300301

301302
static int sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)

‎drivers/mmc/host/sdhci.c‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -2367,23 +2367,6 @@ void sdhci_set_ios_common(struct mmc_host *mmc, struct mmc_ios *ios)
23672367
(ios->power_mode == MMC_POWER_UP) &&
23682368
!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN))
23692369
sdhci_enable_preset_value(host, false);
2370-
2371-
if (!ios->clock || ios->clock != host->clock) {
2372-
host->ops->set_clock(host, ios->clock);
2373-
host->clock = ios->clock;
2374-
2375-
if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK &&
2376-
host->clock) {
2377-
host->timeout_clk = mmc->actual_clock ?
2378-
mmc->actual_clock / 1000 :
2379-
host->clock / 1000;
2380-
mmc->max_busy_timeout =
2381-
host->ops->get_max_timeout_count ?
2382-
host->ops->get_max_timeout_count(host) :
2383-
1 << 27;
2384-
mmc->max_busy_timeout /= host->timeout_clk;
2385-
}
2386-
}
23872370
}
23882371
EXPORT_SYMBOL_GPL(sdhci_set_ios_common);
23892372

@@ -2410,6 +2393,23 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
24102393

24112394
sdhci_set_ios_common(mmc, ios);
24122395

2396+
if (!ios->clock || ios->clock != host->clock) {
2397+
host->ops->set_clock(host, ios->clock);
2398+
host->clock = ios->clock;
2399+
2400+
if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK &&
2401+
host->clock) {
2402+
host->timeout_clk = mmc->actual_clock ?
2403+
mmc->actual_clock / 1000 :
2404+
host->clock / 1000;
2405+
mmc->max_busy_timeout =
2406+
host->ops->get_max_timeout_count ?
2407+
host->ops->get_max_timeout_count(host) :
2408+
1 << 27;
2409+
mmc->max_busy_timeout /= host->timeout_clk;
2410+
}
2411+
}
2412+
24132413
if (host->ops->set_power)
24142414
host->ops->set_power(host, ios->power_mode, ios->vdd);
24152415
else

0 commit comments

Comments
 (0)